[PATCH] D52964: [x86] use demanded bits to simplify masked store codegen

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

In https://reviews.llvm.org/D52964#1258721, @RKSimon wrote:

> LGTM - the AVX1 regression needs SIGN_EXTEND_VECTOR_INREG support adding to SimplifyDemandedBits which I intend to do as a follow up patch


For reference, that was committed here:
https://reviews.llvm.org/rL344043

...so I'll update the test file and commit soon.


https://reviews.llvm.org/D52964