[PATCH] D52975: [TargetLowering][RISCV] Introduce getExtendForShiftAmount and implement for RISC-V

[Eli Friedman via Phabricator via llvm-commits]

efriedma added a comment.

I guess that sentence was weird. I meant, if the shift amount is too large, DAGCombine will fold the shift to undef.


https://reviews.llvm.org/D52975