[PATCH] D52970: [X86][AVX2] Enable ZERO_EXTEND_VECTOR_INREG lowering of 256-bit vectors

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 8 11:42:52 PDT 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL343991: [X86][AVX2] Enable ZERO_EXTEND_VECTOR_INREG lowering of 256-bit vectors (authored by RKSimon, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D52970?vs=168688&id=168691#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D52970

Files:
  llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
  llvm/trunk/test/CodeGen/X86/avg.ll
  llvm/trunk/test/CodeGen/X86/pr35443.ll
  llvm/trunk/test/CodeGen/X86/vector-zext.ll

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