[PATCH] D52980: [X86][AVX1] Enable *_EXTEND_VECTOR_INREG lowering of 256-bit vectors

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: craig.topper, spatel.

As discussed on https://reviews.llvm.org/D52964, this adds 256-bit *_EXTEND_VECTOR_INREG lowering support for AVX1 targets to help improve SimplifyDemandedBits handling.

This is an extension to https://reviews.llvm.org/D52970 - it includes those diffs here, but I'd like to get https://reviews.llvm.org/D52970 dealt with first.


Repository:
  rL LLVM

https://reviews.llvm.org/D52980

Files:
  lib/Target/X86/X86ISelLowering.cpp
  test/CodeGen/X86/avg.ll
  test/CodeGen/X86/cast-vsel.ll
  test/CodeGen/X86/madd.ll
  test/CodeGen/X86/pmaddubsw.ll
  test/CodeGen/X86/pr15267.ll
  test/CodeGen/X86/pr35443.ll
  test/CodeGen/X86/psubus.ll
  test/CodeGen/X86/shrink_vmul.ll
  test/CodeGen/X86/v8i1-masks.ll
  test/CodeGen/X86/vec_cast2.ll
  test/CodeGen/X86/vec_int_to_fp.ll
  test/CodeGen/X86/vector-sext.ll
  test/CodeGen/X86/vector-zext.ll
  test/CodeGen/X86/vselect-avx.ll

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