[llvm] r343942 - [DAGCombiner] allow undefs when matching vector splats for fmul folds

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Sun Oct  7 09:05:37 2018
New Revision: 343942

URL: http://llvm.org/viewvc/llvm-project?rev=343942&view=rev
Log:
[DAGCombiner] allow undefs when matching vector splats for fmul folds

Modified:
    llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
    llvm/trunk/test/CodeGen/X86/fmul-combines.ll

Modified: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp?rev=343942&r1=343941&r2=343942&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp Sun Oct  7 09:05:37 2018
@@ -11083,8 +11083,8 @@ SDValue DAGCombiner::visitFSUB(SDNode *N
 SDValue DAGCombiner::visitFMUL(SDNode *N) {
   SDValue N0 = N->getOperand(0);
   SDValue N1 = N->getOperand(1);
-  ConstantFPSDNode *N0CFP = isConstOrConstSplatFP(N0);
-  ConstantFPSDNode *N1CFP = isConstOrConstSplatFP(N1);
+  ConstantFPSDNode *N0CFP = isConstOrConstSplatFP(N0, true);
+  ConstantFPSDNode *N1CFP = isConstOrConstSplatFP(N1, true);
   EVT VT = N->getValueType(0);
   SDLoc DL(N);
   const TargetOptions &Options = DAG.getTarget().Options;

Modified: llvm/trunk/test/CodeGen/X86/fmul-combines.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/fmul-combines.ll?rev=343942&r1=343941&r2=343942&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/fmul-combines.ll (original)
+++ llvm/trunk/test/CodeGen/X86/fmul-combines.ll Sun Oct  7 09:05:37 2018
@@ -23,8 +23,7 @@ define <4 x float> @fmul_zero_nsz_nnan(<
 define <4 x float> @fmul_zero_nsz_nnan_undef(<4 x float> %x) nounwind {
 ; CHECK-LABEL: fmul_zero_nsz_nnan_undef:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    xorps %xmm1, %xmm1
-; CHECK-NEXT:    mulps %xmm1, %xmm0
+; CHECK-NEXT:    xorps %xmm0, %xmm0
 ; CHECK-NEXT:    retq
   %r = fmul nsz nnan <4 x float> %x, <float 0.0, float 0.0, float 0.0, float undef>
   ret <4 x float> %r
@@ -53,7 +52,7 @@ define <4 x float> @fmul2_v4f32(<4 x flo
 define <4 x float> @fmul2_v4f32_undef(<4 x float> %x) {
 ; CHECK-LABEL: fmul2_v4f32_undef:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    mulps {{.*}}(%rip), %xmm0
+; CHECK-NEXT:    addps %xmm0, %xmm0
 ; CHECK-NEXT:    retq
   %y = fmul <4 x float> %x, <float undef, float 2.0, float 2.0, float 2.0>
   ret <4 x float> %y
@@ -89,8 +88,7 @@ define <4 x float> @fmul0_v4f32(<4 x flo
 define <4 x float> @fmul0_v4f32_undef(<4 x float> %x) #0 {
 ; CHECK-LABEL: fmul0_v4f32_undef:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    xorps %xmm1, %xmm1
-; CHECK-NEXT:    mulps %xmm1, %xmm0
+; CHECK-NEXT:    xorps %xmm0, %xmm0
 ; CHECK-NEXT:    retq
   %y = fmul <4 x float> %x, <float undef, float 0.0, float undef, float 0.0>
   ret <4 x float> %y