[llvm] r343863 - [x86] add test for (X - 0.0) vector with undef elts; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Fri Oct  5 10:36:51 2018
New Revision: 343863

URL: http://llvm.org/viewvc/llvm-project?rev=343863&view=rev
Log:
[x86] add test for (X - 0.0) vector with undef elts; NFC

Modified:
    llvm/trunk/test/CodeGen/X86/vec_fneg.ll

Modified: llvm/trunk/test/CodeGen/X86/vec_fneg.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/vec_fneg.ll?rev=343863&r1=343862&r2=343863&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/vec_fneg.ll (original)
+++ llvm/trunk/test/CodeGen/X86/vec_fneg.ll Fri Oct  5 10:36:51 2018
@@ -99,15 +99,15 @@ define <2 x float> @fneg_bitcast(i64 %i)
   ret <2 x float> %fneg
 }
 
-define <4 x float> @undef_elts_v4f32(<4 x float> %x) {
-; X32-SSE-LABEL: undef_elts_v4f32:
+define <4 x float> @fneg_undef_elts_v4f32(<4 x float> %x) {
+; X32-SSE-LABEL: fneg_undef_elts_v4f32:
 ; X32-SSE:       # %bb.0:
 ; X32-SSE-NEXT:    movaps {{.*#+}} xmm1 = <-0,u,u,-0>
 ; X32-SSE-NEXT:    subps %xmm0, %xmm1
 ; X32-SSE-NEXT:    movaps %xmm1, %xmm0
 ; X32-SSE-NEXT:    retl
 ;
-; X64-SSE-LABEL: undef_elts_v4f32:
+; X64-SSE-LABEL: fneg_undef_elts_v4f32:
 ; X64-SSE:       # %bb.0:
 ; X64-SSE-NEXT:    movaps {{.*#+}} xmm1 = <-0,u,u,-0>
 ; X64-SSE-NEXT:    subps %xmm0, %xmm1
@@ -117,3 +117,29 @@ define <4 x float> @undef_elts_v4f32(<4
   ret <4 x float> %r
 }
 
+; This isn't fneg, but similarly check that (X - 0.0) is simplified.
+
+define <4 x float> @fsub0_undef_elts_v4f32(<4 x float> %x) {
+; X32-SSE1-LABEL: fsub0_undef_elts_v4f32:
+; X32-SSE1:       # %bb.0:
+; X32-SSE1-NEXT:    retl
+;
+; X32-SSE2-LABEL: fsub0_undef_elts_v4f32:
+; X32-SSE2:       # %bb.0:
+; X32-SSE2-NEXT:    xorps %xmm1, %xmm1
+; X32-SSE2-NEXT:    subps %xmm1, %xmm0
+; X32-SSE2-NEXT:    retl
+;
+; X64-SSE1-LABEL: fsub0_undef_elts_v4f32:
+; X64-SSE1:       # %bb.0:
+; X64-SSE1-NEXT:    retq
+;
+; X64-SSE2-LABEL: fsub0_undef_elts_v4f32:
+; X64-SSE2:       # %bb.0:
+; X64-SSE2-NEXT:    xorps %xmm1, %xmm1
+; X64-SSE2-NEXT:    subps %xmm1, %xmm0
+; X64-SSE2-NEXT:    retq
+  %r = fsub <4 x float> %x, <float 0.0, float undef, float 0.0, float undef>
+  ret <4 x float> %r
+}
+