[llvm] r343806 - [InstCombine] reduce code duplication in SimplifyDemandedVectorElts; NFCI
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 4 12:12:07 PDT 2018
Author: spatel
Date: Thu Oct 4 12:12:07 2018
New Revision: 343806
URL: http://llvm.org/viewvc/llvm-project?rev=343806&view=rev
Log:
[InstCombine] reduce code duplication in SimplifyDemandedVectorElts; NFCI
Modified:
llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
Modified: llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp?rev=343806&r1=343805&r2=343806&view=diff
==============================================================================
--- llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp (original)
+++ llvm/trunk/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp Thu Oct 4 12:12:07 2018
@@ -1052,8 +1052,7 @@ Value *InstCombiner::SimplifyDemandedVec
UndefElts = 0;
- // Handle ConstantAggregateZero, ConstantVector, ConstantDataSequential.
- if (Constant *C = dyn_cast<Constant>(V)) {
+ if (auto *C = dyn_cast<Constant>(V)) {
// Check if this is identity. If so, return 0 since we are not simplifying
// anything.
if (DemandedElts.isAllOnesValue())
@@ -1061,7 +1060,6 @@ Value *InstCombiner::SimplifyDemandedVec
Type *EltTy = cast<VectorType>(V->getType())->getElementType();
Constant *Undef = UndefValue::get(EltTy);
-
SmallVector<Constant*, 16> Elts;
for (unsigned i = 0; i != VWidth; ++i) {
if (!DemandedElts[i]) { // If not demanded, set to undef.
@@ -1109,9 +1107,21 @@ Value *InstCombiner::SimplifyDemandedVec
if (!I) return nullptr; // Only analyze instructions.
bool MadeChange = false;
+ auto simplifyAndSetOp = [&](Instruction *Inst, unsigned OpNum,
+ APInt Demanded, APInt &Undef) {
+ auto *II = dyn_cast<IntrinsicInst>(Inst);
+ Value *Op = II ? II->getArgOperand(OpNum) : Inst->getOperand(OpNum);
+ if (Value *V = SimplifyDemandedVectorElts(Op, Demanded, Undef, Depth + 1)) {
+ if (II)
+ II->setArgOperand(OpNum, V);
+ else
+ Inst->setOperand(OpNum, V);
+ MadeChange = true;
+ }
+ };
+
APInt UndefElts2(VWidth, 0);
APInt UndefElts3(VWidth, 0);
- Value *TmpV;
switch (I->getOpcode()) {
default: break;
@@ -1122,9 +1132,7 @@ Value *InstCombiner::SimplifyDemandedVec
if (!Idx) {
// Note that we can't propagate undef elt info, because we don't know
// which elt is getting updated.
- TmpV = SimplifyDemandedVectorElts(I->getOperand(0), DemandedElts,
- UndefElts2, Depth + 1);
- if (TmpV) { I->setOperand(0, TmpV); MadeChange = true; }
+ simplifyAndSetOp(I, 0, DemandedElts, UndefElts2);
break;
}
@@ -1134,9 +1142,8 @@ Value *InstCombiner::SimplifyDemandedVec
APInt PreInsertDemandedElts = DemandedElts;
if (IdxNo < VWidth)
PreInsertDemandedElts.clearBit(IdxNo);
- TmpV = SimplifyDemandedVectorElts(I->getOperand(0), PreInsertDemandedElts,
- UndefElts, Depth + 1);
- if (TmpV) { I->setOperand(0, TmpV); MadeChange = true; }
+
+ simplifyAndSetOp(I, 0, PreInsertDemandedElts, UndefElts);
// If this is inserting an element that isn't demanded, remove this
// insertelement.
@@ -1169,14 +1176,10 @@ Value *InstCombiner::SimplifyDemandedVec
}
APInt LHSUndefElts(LHSVWidth, 0);
- TmpV = SimplifyDemandedVectorElts(I->getOperand(0), LeftDemanded,
- LHSUndefElts, Depth + 1);
- if (TmpV) { I->setOperand(0, TmpV); MadeChange = true; }
+ simplifyAndSetOp(I, 0, LeftDemanded, LHSUndefElts);
APInt RHSUndefElts(LHSVWidth, 0);
- TmpV = SimplifyDemandedVectorElts(I->getOperand(1), RightDemanded,
- RHSUndefElts, Depth + 1);
- if (TmpV) { I->setOperand(1, TmpV); MadeChange = true; }
+ simplifyAndSetOp(I, 1, RightDemanded, RHSUndefElts);
bool NewUndefElts = false;
unsigned LHSIdx = -1u, LHSValIdx = -1u;
@@ -1269,12 +1272,7 @@ Value *InstCombiner::SimplifyDemandedVec
// element of the select condition is known undef, then we are free to
// choose the output value from either arm of the select. If we know that
// one of those values is undef, then the output can be undef.
- if (Value *V = SimplifyDemandedVectorElts(Sel->getCondition(),
- DemandedElts, UndefElts,
- Depth + 1)) {
- Sel->setCondition(V);
- MadeChange = true;
- }
+ simplifyAndSetOp(I, 0, DemandedElts, UndefElts);
}
// Next, see if we can transform the arms of the select.
@@ -1296,17 +1294,8 @@ Value *InstCombiner::SimplifyDemandedVec
}
}
- if (Value *V = SimplifyDemandedVectorElts(Sel->getTrueValue(), DemandedLHS,
- UndefElts2, Depth + 1)) {
- Sel->setTrueValue(V);
- MadeChange = true;
- }
-
- if (Value *V = SimplifyDemandedVectorElts(Sel->getFalseValue(), DemandedRHS,
- UndefElts3, Depth + 1)) {
- Sel->setFalseValue(V);
- MadeChange = true;
- }
+ simplifyAndSetOp(I, 1, DemandedLHS, UndefElts2);
+ simplifyAndSetOp(I, 2, DemandedRHS, UndefElts3);
// Output elements are undefined if the element from each arm is undefined.
// TODO: This can be improved. See comment in select condition handling.
@@ -1348,12 +1337,7 @@ Value *InstCombiner::SimplifyDemandedVec
break;
}
- TmpV = SimplifyDemandedVectorElts(I->getOperand(0), InputDemandedElts,
- UndefElts2, Depth + 1);
- if (TmpV) {
- I->setOperand(0, TmpV);
- MadeChange = true;
- }
+ simplifyAndSetOp(I, 0, InputDemandedElts, UndefElts2);
if (VWidth == InVWidth) {
UndefElts = UndefElts2;
@@ -1380,9 +1364,7 @@ Value *InstCombiner::SimplifyDemandedVec
}
case Instruction::FPTrunc:
case Instruction::FPExt:
- TmpV = SimplifyDemandedVectorElts(I->getOperand(0), DemandedElts, UndefElts,
- Depth + 1);
- if (TmpV) { I->setOperand(0, TmpV); MadeChange = true; }
+ simplifyAndSetOp(I, 0, DemandedElts, UndefElts);
break;
case Instruction::Call: {
@@ -1402,9 +1384,7 @@ Value *InstCombiner::SimplifyDemandedVec
// Only the lower element is used.
DemandedElts = 1;
- TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), DemandedElts,
- UndefElts, Depth + 1);
- if (TmpV) { II->setArgOperand(0, TmpV); MadeChange = true; }
+ simplifyAndSetOp(II, 0, DemandedElts, UndefElts);
// Only the lower element is undefined. The high elements are zero.
UndefElts = UndefElts[0];
@@ -1413,9 +1393,7 @@ Value *InstCombiner::SimplifyDemandedVec
// Unary scalar-as-vector operations that work column-wise.
case Intrinsic::x86_sse_rcp_ss:
case Intrinsic::x86_sse_rsqrt_ss:
- TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), DemandedElts,
- UndefElts, Depth + 1);
- if (TmpV) { II->setArgOperand(0, TmpV); MadeChange = true; }
+ simplifyAndSetOp(II, 0, DemandedElts, UndefElts);
// If lowest element of a scalar op isn't used then use Arg0.
if (!DemandedElts[0]) {
@@ -1435,9 +1413,7 @@ Value *InstCombiner::SimplifyDemandedVec
case Intrinsic::x86_sse2_min_sd:
case Intrinsic::x86_sse2_max_sd:
case Intrinsic::x86_sse2_cmp_sd: {
- TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), DemandedElts,
- UndefElts, Depth + 1);
- if (TmpV) { II->setArgOperand(0, TmpV); MadeChange = true; }
+ simplifyAndSetOp(II, 0, DemandedElts, UndefElts);
// If lowest element of a scalar op isn't used then use Arg0.
if (!DemandedElts[0]) {
@@ -1447,9 +1423,7 @@ Value *InstCombiner::SimplifyDemandedVec
// Only lower element is used for operand 1.
DemandedElts = 1;
- TmpV = SimplifyDemandedVectorElts(II->getArgOperand(1), DemandedElts,
- UndefElts2, Depth + 1);
- if (TmpV) { II->setArgOperand(1, TmpV); MadeChange = true; }
+ simplifyAndSetOp(II, 1, DemandedElts, UndefElts2);
// Lower element is undefined if both lower elements are undefined.
// Consider things like undef&0. The result is known zero, not undef.
@@ -1466,9 +1440,7 @@ Value *InstCombiner::SimplifyDemandedVec
// Don't use the low element of operand 0.
APInt DemandedElts2 = DemandedElts;
DemandedElts2.clearBit(0);
- TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), DemandedElts2,
- UndefElts, Depth + 1);
- if (TmpV) { II->setArgOperand(0, TmpV); MadeChange = true; }
+ simplifyAndSetOp(II, 0, DemandedElts2, UndefElts);
// If lowest element of a scalar op isn't used then use Arg0.
if (!DemandedElts[0]) {
@@ -1478,9 +1450,7 @@ Value *InstCombiner::SimplifyDemandedVec
// Only lower element is used for operand 1.
DemandedElts = 1;
- TmpV = SimplifyDemandedVectorElts(II->getArgOperand(1), DemandedElts,
- UndefElts2, Depth + 1);
- if (TmpV) { II->setArgOperand(1, TmpV); MadeChange = true; }
+ simplifyAndSetOp(II, 1, DemandedElts, UndefElts2);
// Take the high undef elements from operand 0 and take the lower element
// from operand 1.
@@ -1504,9 +1474,7 @@ Value *InstCombiner::SimplifyDemandedVec
case Intrinsic::x86_avx512_mask_sub_sd_round:
case Intrinsic::x86_avx512_mask_max_sd_round:
case Intrinsic::x86_avx512_mask_min_sd_round:
- TmpV = SimplifyDemandedVectorElts(II->getArgOperand(0), DemandedElts,
- UndefElts, Depth + 1);
- if (TmpV) { II->setArgOperand(0, TmpV); MadeChange = true; }
+ simplifyAndSetOp(II, 0, DemandedElts, UndefElts);
// If lowest element of a scalar op isn't used then use Arg0.
if (!DemandedElts[0]) {
@@ -1516,12 +1484,8 @@ Value *InstCombiner::SimplifyDemandedVec
// Only lower element is used for operand 1 and 2.
DemandedElts = 1;
- TmpV = SimplifyDemandedVectorElts(II->getArgOperand(1), DemandedElts,
- UndefElts2, Depth + 1);
- if (TmpV) { II->setArgOperand(1, TmpV); MadeChange = true; }
- TmpV = SimplifyDemandedVectorElts(II->getArgOperand(2), DemandedElts,
- UndefElts3, Depth + 1);
- if (TmpV) { II->setArgOperand(2, TmpV); MadeChange = true; }
+ simplifyAndSetOp(II, 1, DemandedElts, UndefElts2);
+ simplifyAndSetOp(II, 2, DemandedElts, UndefElts3);
// Lower element is undefined if all three lower elements are undefined.
// Consider things like undef&0. The result is known zero, not undef.
@@ -1566,14 +1530,8 @@ Value *InstCombiner::SimplifyDemandedVec
}
// Demand elements from the operand.
- auto *Op = II->getArgOperand(OpNum);
APInt OpUndefElts(InnerVWidth, 0);
- TmpV = SimplifyDemandedVectorElts(Op, OpDemandedElts, OpUndefElts,
- Depth + 1);
- if (TmpV) {
- II->setArgOperand(OpNum, TmpV);
- MadeChange = true;
- }
+ simplifyAndSetOp(II, OpNum, OpDemandedElts, OpUndefElts);
// Pack the operand's UNDEF elements, one lane at a time.
OpUndefElts = OpUndefElts.zext(VWidth);
@@ -1601,10 +1559,7 @@ Value *InstCombiner::SimplifyDemandedVec
// PERMV
case Intrinsic::x86_avx2_permd:
case Intrinsic::x86_avx2_permps: {
- Value *Op1 = II->getArgOperand(1);
- TmpV = SimplifyDemandedVectorElts(Op1, DemandedElts, UndefElts,
- Depth + 1);
- if (TmpV) { II->setArgOperand(1, TmpV); MadeChange = true; }
+ simplifyAndSetOp(II, 1, DemandedElts, UndefElts);
break;
}
@@ -1625,27 +1580,23 @@ Value *InstCombiner::SimplifyDemandedVec
break;
}
- }
+ } // switch on IntrinsicID
break;
- }
- }
+ } // case Call
+ } // switch on Opcode
// TODO: We bail completely on integer div/rem and shifts because they have
// UB/poison potential, but that should be refined.
BinaryOperator *BO;
if (match(I, m_BinOp(BO)) && !BO->isIntDivRem() && !BO->isShift()) {
- TmpV = SimplifyDemandedVectorElts(I->getOperand(0), DemandedElts, UndefElts,
- Depth + 1);
- if (TmpV) { I->setOperand(0, TmpV); MadeChange = true; }
- TmpV = SimplifyDemandedVectorElts(I->getOperand(1), DemandedElts,
- UndefElts2, Depth + 1);
- if (TmpV) { I->setOperand(1, TmpV); MadeChange = true; }
+ simplifyAndSetOp(I, 0, DemandedElts, UndefElts);
+ simplifyAndSetOp(I, 1, DemandedElts, UndefElts2);
// TODO: If this is a potentially poison-producing instruction, we need
// to drop the wrapping/exact flags?
- // Output elements are undefined if both are undefined. Consider things
- // like undef&0. The result is known zero, not undef.
+ // Output elements are undefined if both are undefined. Consider things
+ // like undef & 0. The result is known zero, not undef.
UndefElts &= UndefElts2;
}
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