[PATCH] D48725: [SLP] Vectorize bit-parallel operations with SWAR.

[Clement Courbet via Phabricator via llvm-commits]

courbet added a comment.

In https://reviews.llvm.org/D48725#1249545, @efriedma wrote:

> Yes, like I said, your original testcase doesn't get merged by DAGCombine unless "-combiner-global-alias-analysis" is enabled (which it isn't, by default).


Oh, I see, thanks. I missed the fact that using this flag will actually reorder the load/stores in the chain before entering CombineLoadStores (I was looking for analysis usage from CombineLoadStores).


Repository:
  rL LLVM

https://reviews.llvm.org/D48725