[PATCH] D52816: [AArch64] Create proper memoperand for multi-vector stores
David Greene via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 2 18:31:58 PDT 2018
greened added a comment.
I don't have a good testcase for this, unfortunately. I discovered it while investigating strange aliasing results on a very large code. I'm not entirely sure how to write a synthetic test for machine-level alias analysis. I can write the IR of course but I don't know how to run alias analysis on it and spit out useful information to compare with FileCheck. The alias analysis has to happen after isel. Is anyone aware of other tests that do something like that?
Repository:
rL LLVM
https://reviews.llvm.org/D52816
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