[llvm] r343647 - IR: Move AtomicRMW string names into class
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 2 16:44:11 PDT 2018
Author: arsenm
Date: Tue Oct 2 16:44:11 2018
New Revision: 343647
URL: http://llvm.org/viewvc/llvm-project?rev=343647&view=rev
Log:
IR: Move AtomicRMW string names into class
This will be used to improve error messages in a future commit.
Modified:
llvm/trunk/include/llvm/IR/Instructions.h
llvm/trunk/lib/IR/AsmWriter.cpp
llvm/trunk/lib/IR/Instructions.cpp
Modified: llvm/trunk/include/llvm/IR/Instructions.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/include/llvm/IR/Instructions.h?rev=343647&r1=343646&r2=343647&view=diff
==============================================================================
--- llvm/trunk/include/llvm/IR/Instructions.h (original)
+++ llvm/trunk/include/llvm/IR/Instructions.h Tue Oct 2 16:44:11 2018
@@ -735,6 +735,8 @@ public:
return static_cast<BinOp>(getSubclassDataFromInstruction() >> 5);
}
+ static StringRef getOperationName(BinOp Op);
+
void setOperation(BinOp Operation) {
unsigned short SubclassData = getSubclassDataFromInstruction();
setInstructionSubclassData((SubclassData & 31) |
Modified: llvm/trunk/lib/IR/AsmWriter.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/IR/AsmWriter.cpp?rev=343647&r1=343646&r2=343647&view=diff
==============================================================================
--- llvm/trunk/lib/IR/AsmWriter.cpp (original)
+++ llvm/trunk/lib/IR/AsmWriter.cpp Tue Oct 2 16:44:11 2018
@@ -1241,24 +1241,6 @@ static void WriteAsOperandInternal(raw_o
SlotTracker *Machine, const Module *Context,
bool FromValue = false);
-static void writeAtomicRMWOperation(raw_ostream &Out,
- AtomicRMWInst::BinOp Op) {
- switch (Op) {
- default: Out << " <unknown operation " << Op << ">"; break;
- case AtomicRMWInst::Xchg: Out << " xchg"; break;
- case AtomicRMWInst::Add: Out << " add"; break;
- case AtomicRMWInst::Sub: Out << " sub"; break;
- case AtomicRMWInst::And: Out << " and"; break;
- case AtomicRMWInst::Nand: Out << " nand"; break;
- case AtomicRMWInst::Or: Out << " or"; break;
- case AtomicRMWInst::Xor: Out << " xor"; break;
- case AtomicRMWInst::Max: Out << " max"; break;
- case AtomicRMWInst::Min: Out << " min"; break;
- case AtomicRMWInst::UMax: Out << " umax"; break;
- case AtomicRMWInst::UMin: Out << " umin"; break;
- }
-}
-
static void WriteOptimizationInfo(raw_ostream &Out, const User *U) {
if (const FPMathOperator *FPO = dyn_cast<const FPMathOperator>(U)) {
// 'Fast' is an abbreviation for all fast-math-flags.
@@ -3612,7 +3594,7 @@ void AssemblyWriter::printInstruction(co
// Print out the atomicrmw operation
if (const AtomicRMWInst *RMWI = dyn_cast<AtomicRMWInst>(&I))
- writeAtomicRMWOperation(Out, RMWI->getOperation());
+ Out << ' ' << AtomicRMWInst::getOperationName(RMWI->getOperation());
// Print out the type of the operands...
const Value *Operand = I.getNumOperands() ? I.getOperand(0) : nullptr;
Modified: llvm/trunk/lib/IR/Instructions.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/IR/Instructions.cpp?rev=343647&r1=343646&r2=343647&view=diff
==============================================================================
--- llvm/trunk/lib/IR/Instructions.cpp (original)
+++ llvm/trunk/lib/IR/Instructions.cpp Tue Oct 2 16:44:11 2018
@@ -1336,6 +1336,37 @@ AtomicRMWInst::AtomicRMWInst(BinOp Opera
Init(Operation, Ptr, Val, Ordering, SSID);
}
+StringRef AtomicRMWInst::getOperationName(BinOp Op) {
+ switch (Op) {
+ case AtomicRMWInst::Xchg:
+ return "xchg";
+ case AtomicRMWInst::Add:
+ return "add";
+ case AtomicRMWInst::Sub:
+ return "sub";
+ case AtomicRMWInst::And:
+ return "and";
+ case AtomicRMWInst::Nand:
+ return "nand";
+ case AtomicRMWInst::Or:
+ return "or";
+ case AtomicRMWInst::Xor:
+ return "xor";
+ case AtomicRMWInst::Max:
+ return "max";
+ case AtomicRMWInst::Min:
+ return "min";
+ case AtomicRMWInst::UMax:
+ return "umax";
+ case AtomicRMWInst::UMin:
+ return "umin";
+ case AtomicRMWInst::BAD_BINOP:
+ return "<invalid operation>";
+ }
+
+ llvm_unreachable("invalid atomicrmw operation");
+}
+
//===----------------------------------------------------------------------===//
// FenceInst Implementation
//===----------------------------------------------------------------------===//
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