[www] r343557 - update talk abstract

[Kostya Serebryany via llvm-commits]

Author: kcc
Date: Mon Oct  1 18:31:04 2018
New Revision: 343557

URL: http://llvm.org/viewvc/llvm-project?rev=343557&view=rev
Log:
update talk abstract

Modified:
    www/trunk/devmtg/2018-10/talk-abstracts.html

Modified: www/trunk/devmtg/2018-10/talk-abstracts.html
URL: http://llvm.org/viewvc/llvm-project/www/trunk/devmtg/2018-10/talk-abstracts.html?rev=343557&r1=343556&r2=343557&view=diff
==============================================================================
--- www/trunk/devmtg/2018-10/talk-abstracts.html (original)
+++ www/trunk/devmtg/2018-10/talk-abstracts.html Mon Oct  1 18:31:04 2018
@@ -183,9 +183,18 @@ In this talk, we describe the design and
 	<li><a id="talk16">Memory Tagging, how it improves C++ memory safety, and what does it mean for compiler optimizations</a>
 	<br><i>Kostya Serebryany, Evgenii Stepanov, Vlad Tsyrklevich</i><br>
 	<p>
-Memory safety in C++ remains largely unresolved. A technique usually called ""memory tagging"" may dramatically improve the situation if implemented in hardware with reasonable overhead. In this talk we will describe two existing implementations of memory tagging. One is SPARC ADI, a full hardware implementation. The other is HWASAN, a partially hardware-assisted LLVM-based tool for AArch64. We describe the basic idea, evaluate the two implementations, and explain how they improve memory safety. We'll pay extra attention to compiler optimizations required to support memory tagging efficiently.
+Memory safety in C++ remains largely unresolved.
+A technique usually called "memory tagging" may dramatically improve the situation if implemented in hardware with reasonable overhead.
+In this talk we will describe three existing implementations of memory tagging.
+One is SPARC ADI, a full hardware implementation.
+Another is HWASAN, a partially hardware-assisted LLVM-based tool for AArch64.
+Last but not least, ARM MTE, a
+<a href='https://community.arm.com/processors/b/blog/posts/arm-a-profile-architecture-2018-developments-armv85a'>recently announced</a>
+hardware extension for AArch64.
+We describe the basic idea, evaluate the three implementations, and explain how they improve memory safety.
+We'll pay extra attention to compiler optimizations required to support memory tagging efficiently.
 </p><p>
-If you know what AddressSanitizer (ASAN) is, think of Memory Tagging as of ""Low-overhead ASAN on steroids in hardware"".
+If you know what AddressSanitizer (ASAN) is, think of Memory Tagging as of "Low-overhead ASAN on steroids in hardware".
 
 This talk is partially based on the paper “Memory Tagging and how it improves C/C++ memory safety” (https://arxiv.org/pdf/1802.09517.pdf)
 	</p>