[PATCH] D52555: [X86] Fix use SSE registers if no-x87 is selected.

[Nick Desaulniers via Phabricator via llvm-commits]

nickdesaulniers added inline comments.


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:282
+        setOperationAction(ISD::FP_TO_UINT, MVT::i32, Promote);
       setOperationAction(ISD::FP_TO_UINT   , MVT::i64  , Expand);
     }
----------------
How come not also this case? Or any of the ISD::FP_TO_SINT?


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:552
+  } else if (X86ScalarSSEf32 &&
+             (UseX87 || (!useSoftFloat() && Subtarget.is64Bit()))) {
     // Use SSE for f32, x87 for f64.
----------------
Below (L1947) you check `Subtarget.is64Bit() || Subtarget.hasX87()`, so I'm curious here why the additional `!useSoftFloat()`?


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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:580-590
+    if (UseX87) {
+      addLegalFPImmediate(APFloat(+0.0)); // FLD0
+      addLegalFPImmediate(APFloat(+1.0)); // FLD1
+      addLegalFPImmediate(APFloat(-0.0)); // FLD0/FCHS
+      addLegalFPImmediate(APFloat(-1.0)); // FLD1/FCHS
 
+      // Always expand sin/cos functions even though x87 has an instruction.
----------------
Is it possible to share some of this code with the case starting at L591? Seems to be a fair amount of code duplication.  Maybe a helper, or a single case can be checked for these?


Repository:
  rL LLVM

https://reviews.llvm.org/D52555