[PATCH] D52668: [DAGCombiner] Improve X div/rem Y fold if single bit element type

[Sanjay Patel via Phabricator via llvm-commits]

spatel added inline comments.


================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:3133
   // division-by-zero or remainder-by-zero, so assume the divisor is 1.
   // Similarly, if we're zero-extending a boolean divisor, then assume it's a 1.
+  if ((N1C && N1C->isOne()) || (VT.getScalarType() == MVT::i1))
----------------
There should be a TODO comment on the zext line because we don't handle that pattern here.


================
Comment at: test/CodeGen/X86/combine-urem.ll:388
+; CHECK-NEXT:    retq
+  %r = srem i1 %x, %y
+  ret i1 %r
----------------
This test should use 'urem' not 'srem'.
Please commit the tests with baseline assertions as a preliminary step.


Repository:
  rL LLVM

https://reviews.llvm.org/D52668