[PATCH] D52661: [DAGCombiner] [NFC] Improve X div/rem 1 fold
Dávid Bolvanský via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 28 12:01:03 PDT 2018
This revision was automatically updated to reflect the committed changes.
Closed by commit rL343349: [DAGCombiner] [NFC] Improve X div/rem 1 fold (authored by xbolva00, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D52661?vs=167510&id=167524#toc
Repository:
rL LLVM
https://reviews.llvm.org/D52661
Files:
llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
Index: llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
===================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ llvm/trunk/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -3103,6 +3103,7 @@
unsigned Opc = N->getOpcode();
bool IsDiv = (ISD::SDIV == Opc) || (ISD::UDIV == Opc);
+ ConstantSDNode *N1C = isConstOrConstSplat(N1);
// X / undef -> undef
// X % undef -> undef
@@ -3125,8 +3126,10 @@
if (N0 == N1)
return DAG.getConstant(IsDiv ? 1 : 0, DL, VT);
- // TODO: X / 1 -> X
- // TODO: X % 1 -> 0
+ // X / 1 -> X
+ // X % 1 -> 0
+ if (N1C && N1C->isOne())
+ return IsDiv ? N0 : DAG.getConstant(0, DL, VT);
// If this is a boolean op (single-bit element type), we can't have
// division-by-zero or remainder-by-zero, so assume the divisor is 1.
// Similarly, if we're zero-extending a boolean divisor, then assume it's a 1.
@@ -3152,9 +3155,6 @@
ConstantSDNode *N1C = isConstOrConstSplat(N1);
if (N0C && N1C && !N0C->isOpaque() && !N1C->isOpaque())
return DAG.FoldConstantArithmetic(ISD::SDIV, DL, VT, N0C, N1C);
- // fold (sdiv X, 1) -> X
- if (N1C && N1C->isOne())
- return N0;
// fold (sdiv X, -1) -> 0-X
if (N1C && N1C->isAllOnesValue())
return DAG.getNode(ISD::SUB, DL, VT, DAG.getConstant(0, DL, VT), N0);
@@ -3290,9 +3290,6 @@
if (SDValue Folded = DAG.FoldConstantArithmetic(ISD::UDIV, DL, VT,
N0C, N1C))
return Folded;
- // fold (udiv X, 1) -> X
- if (N1C && N1C->isOne())
- return N0;
// fold (udiv X, -1) -> select(X == -1, 1, 0)
if (N1C && N1C->getAPIntValue().isAllOnesValue())
return DAG.getSelect(DL, VT, DAG.getSetCC(DL, CCVT, N0, N1, ISD::SETEQ),
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