[PATCH] D52559: [AMDGPU] Divergence driven instruction selection. Shift operations.

[Alexander via Phabricator via llvm-commits]

alex-t added inline comments.


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Comment at: lib/Target/AMDGPU/VOP3Instructions.td:587
+    VOP3e_si <op, !cast<VOP3_Pseudo>(NAME).Pfl> {
+      // Hack to stop printing _e64
+      VOP3_Pseudo ps = !cast<VOP3_Pseudo>(NAME);
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rampitec wrote:
> alex-t wrote:
> > rampitec wrote:
> > > Does it really belong to this patch?
> > Sure it does. As soon as I start selecting this _b64  the LIT tests failed because of the odd "_e64" suffix printed by AMDGPUInstrPrinter. It prints it for all with VOP3 flag.
> > The flag was not set before this change because the instructions were created in moveToVALU.  
> > I filed the bug https://bugs.llvm.org/show_bug.cgi?id=39086 for adding the flag to indicate that the instruction does not have 32bit encoding.
> > 
> How can it be possible for moveToVALU to create a VOP3 instruction without a VOP3 flag?
> VOP3_Pseudo sets VOP3 flag. InstSI copies it into TSFlags. VOP3_Real copies TSFlags from a pseudo.
InstSI copies VOP3 to TSFlags and your code checks exactly TSFlags & SIInstrFlags::VOP3


https://reviews.llvm.org/D52559