[PATCH] D52594: [ARM] Remove non-existent cpu arm1176j-s and use mpcore for v6k

[Peter Smith via Phabricator via llvm-commits]

peter.smith created this revision.
peter.smith added reviewers: falstaff84, nickdesaulniers, rengolin, labrinea.
Herald added a reviewer: javed.absar.
Herald added subscribers: chrib, kristof.beyls.

The ARMTargetParser.def contains an entry for arm1176j-s which is the default for the ArmV6K architecture. This cpu does not exist, there are only arm1176jz-s and arm1176jzf-s and they are both architecture ArmV6KZ. The only CPUs that are actually ArmV6K are the mpcore, mpcore_nofpu and later revisions of the arm1136 family r1px (which we don't have a table entry for).

      

This patch removes the arm1176j-s and makes mpcore the default for armv6k. I'll post the update to the clang tests to account for this change in a separate review.

It is difficult to find a simple canonical location for all the different CPUs and what architectures they have. The allowable trademarks for arm11 CPUs are available in https://www.arm.com/company/policies/trademarks/arm-trademark-list/arm11-trademark . The architecture each CPU implements is available in the Technical Reference Manual (TRM) on the Arm website http://infocenter.arm.com/help/topic/com.arm.doc.set.arm11/index.html

This is an alternative fix for https://reviews.llvm.org/D18086


https://reviews.llvm.org/D52594

Files:
  include/llvm/Support/ARMTargetParser.def
  unittests/Support/TargetParserTest.cpp


Index: unittests/Support/TargetParserTest.cpp
===================================================================
--- unittests/Support/TargetParserTest.cpp
+++ unittests/Support/TargetParserTest.cpp
@@ -126,8 +126,6 @@
                          ARM::AEK_DSP, "6"));
   EXPECT_TRUE(testARMCPU("arm1136jz-s", "armv6", "none",
                          ARM::AEK_DSP, "6"));
-  EXPECT_TRUE(testARMCPU("arm1176j-s", "armv6k", "none",
-                         ARM::AEK_DSP, "6K"));
   EXPECT_TRUE(testARMCPU("arm1176jz-s", "armv6kz", "none",
                          ARM::AEK_SEC | ARM::AEK_DSP, "6KZ"));
   EXPECT_TRUE(testARMCPU("mpcore", "armv6k", "vfpv2",
@@ -285,7 +283,7 @@
                          "7-S"));
 }
 
-static constexpr unsigned NumARMCPUArchs = 83;
+static constexpr unsigned NumARMCPUArchs = 82;
 
 TEST(TargetParserTest, testARMCPUArchList) {
   SmallVector<StringRef, NumARMCPUArchs> List;
@@ -346,7 +344,7 @@
       testARMArch("armv6", "arm1136jf-s", "v6",
                           ARMBuildAttrs::CPUArch::v6));
   EXPECT_TRUE(
-      testARMArch("armv6k", "arm1176j-s", "v6k",
+      testARMArch("armv6k", "mpcore", "v6k",
                           ARMBuildAttrs::CPUArch::v6K));
   EXPECT_TRUE(
       testARMArch("armv6t2", "arm1156t2-s", "v6t2",
Index: include/llvm/Support/ARMTargetParser.def
===================================================================
--- include/llvm/Support/ARMTargetParser.def
+++ include/llvm/Support/ARMTargetParser.def
@@ -208,10 +208,9 @@
 ARM_CPU_NAME("arm1136j-s", ARMV6, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("arm1136jf-s", ARMV6, FK_VFPV2, true, ARM::AEK_NONE)
 ARM_CPU_NAME("arm1136jz-s", ARMV6, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1176j-s", ARMV6K, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1176jz-s", ARMV6KZ, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("mpcore", ARMV6K, FK_VFPV2, false, ARM::AEK_NONE)
+ARM_CPU_NAME("mpcore", ARMV6K, FK_VFPV2, true, ARM::AEK_NONE)
 ARM_CPU_NAME("mpcorenovfp", ARMV6K, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1176jz-s", ARMV6KZ, FK_NONE, false, ARM::AEK_NONE)
 ARM_CPU_NAME("arm1176jzf-s", ARMV6KZ, FK_VFPV2, true, ARM::AEK_NONE)
 ARM_CPU_NAME("arm1156t2-s", ARMV6T2, FK_NONE, true, ARM::AEK_NONE)
 ARM_CPU_NAME("arm1156t2f-s", ARMV6T2, FK_VFPV2, false, ARM::AEK_NONE)


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