[PATCH] D50977: [TableGen] Prefer user-defined subregister compositions over inferred ones

Wed Sep 26 12:08:00 PDT 2018

bjope added a comment.

In https://reviews.llvm.org/D50977#1246941, @kparzysz wrote:

> In https://reviews.llvm.org/D50977#1246893, @bjope wrote:
>
> > So it should not be possible to do `subreg_h32(V0)`, right?
>
>
> Tablegen makes registers "inherit" some subregister indices from their subregisters, so you can end up with a h32 of a register that didn't initially have it.

Well, I think tablgen messed up things here. Not sure where you got those tables, but I would have expected to find

  subreg_hh32: { V0->F0S V1->F1S V2->F2S V3->F3S V4->F4S V5->F5S V6->F6S V7->F7S
                V8->F8S V9->F9S V10->F10S V11->F11S V12->F12S V13->F13S V14->F14S V15->F15S
                V16->F16S V17->F17S V18->F18S V19->F19S V20->F20S V21->F21S V22->F22S V23->F23S
                V24->F24S V25->F25S V26->F26S V27->F27S V28->F28S V29->F29S V30->F30S V31->F31S

instead of

  subreg_h32: { V0->F0S V1->F1S V2->F2S V3->F3S V4->F4S V5->F5S V6->F6S V7->F7S
                V8->F8S V9->F9S V10->F10S V11->F11S V12->F12S V13->F13S V14->F14S V15->F15S
                V16->F16S V17->F17S V18->F18S V19->F19S V20->F20S V21->F21S V22->F22S V23->F23S
                V24->F24S V25->F25S V26->F26S V27->F27S V28->F28S V29->F29S V30->F30S V31->F31S

as that would make sense when doing subreg_h32(subreg_h64(V0)). But you got no such entries in your maps. Instead you got these entries for doing subreg_h32 on the V<n> registers, which is something that isn't defined in the definitions in SystemZRegisterInfo.td.

Repository:
  rL LLVM

https://reviews.llvm.org/D50977