[llvm] r343127 - [X86] Update tzcnt fast-isel tests to match clang r343126.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 26 10:19:28 PDT 2018
Author: ctopper
Date: Wed Sep 26 10:19:28 2018
New Revision: 343127
URL: http://llvm.org/viewvc/llvm-project?rev=343127&view=rev
Log:
[X86] Update tzcnt fast-isel tests to match clang r343126.
We now generate cttz with the zero_undef flag set to false. This allows -O0 to avoid the zero check.
Modified:
llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll
llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
Modified: llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll?rev=343127&r1=343126&r2=343127&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel-x86_64.ll Wed Sep 26 10:19:28 2018
@@ -67,14 +67,11 @@ define i64 @test__blsr_u64(i64 %a0) {
define i64 @test__tzcnt_u64(i64 %a0) {
; X64-LABEL: test__tzcnt_u64:
; X64: # %bb.0:
-; X64-NEXT: tzcntq %rdi, %rcx
-; X64-NEXT: movl $64, %eax
-; X64-NEXT: cmovaeq %rcx, %rax
+; X64-NEXT: tzcntq %rdi, %rax
; X64-NEXT: retq
%cmp = icmp ne i64 %a0, 0
- %cttz = call i64 @llvm.cttz.i64(i64 %a0, i1 true)
- %res = select i1 %cmp, i64 %cttz, i64 64
- ret i64 %res
+ %cttz = call i64 @llvm.cttz.i64(i64 %a0, i1 false)
+ ret i64 %cttz
}
;
@@ -151,14 +148,11 @@ define i64 @test_blsr_u64(i64 %a0) {
define i64 @test_tzcnt_u64(i64 %a0) {
; X64-LABEL: test_tzcnt_u64:
; X64: # %bb.0:
-; X64-NEXT: tzcntq %rdi, %rcx
-; X64-NEXT: movl $64, %eax
-; X64-NEXT: cmovaeq %rcx, %rax
+; X64-NEXT: tzcntq %rdi, %rax
; X64-NEXT: retq
%cmp = icmp ne i64 %a0, 0
- %cttz = call i64 @llvm.cttz.i64(i64 %a0, i1 true)
- %res = select i1 %cmp, i64 %cttz, i64 64
- ret i64 %res
+ %cttz = call i64 @llvm.cttz.i64(i64 %a0, i1 false)
+ ret i64 %cttz
}
declare i64 @llvm.cttz.i64(i64, i1)
Modified: llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll?rev=343127&r1=343126&r2=343127&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll (original)
+++ llvm/trunk/test/CodeGen/X86/bmi-intrinsics-fast-isel.ll Wed Sep 26 10:19:28 2018
@@ -11,30 +11,17 @@
define i16 @test__tzcnt_u16(i16 %a0) {
; X32-LABEL: test__tzcnt_u16:
; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movzwl %ax, %ecx
-; X32-NEXT: cmpl $0, %ecx
-; X32-NEXT: jne .LBB0_1
-; X32-NEXT: # %bb.2:
-; X32-NEXT: movw $16, %ax
-; X32-NEXT: retl
-; X32-NEXT: .LBB0_1:
-; X32-NEXT: tzcntw %ax, %ax
+; X32-NEXT: tzcntw {{[0-9]+}}(%esp), %ax
; X32-NEXT: retl
;
; X64-LABEL: test__tzcnt_u16:
; X64: # %bb.0:
-; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: tzcntw %ax, %cx
-; X64-NEXT: cmpl $0, %eax
-; X64-NEXT: movw $16, %ax
-; X64-NEXT: cmovnew %cx, %ax
+; X64-NEXT: tzcntw %di, %ax
; X64-NEXT: retq
%zext = zext i16 %a0 to i32
%cmp = icmp ne i32 %zext, 0
- %cttz = call i16 @llvm.cttz.i16(i16 %a0, i1 true)
- %res = select i1 %cmp, i16 %cttz, i16 16
- ret i16 %res
+ %cttz = call i16 @llvm.cttz.i16(i16 %a0, i1 false)
+ ret i16 %cttz
}
define i32 @test__andn_u32(i32 %a0, i32 %a1) {
@@ -134,26 +121,16 @@ define i32 @test__blsr_u32(i32 %a0) {
define i32 @test__tzcnt_u32(i32 %a0) {
; X32-LABEL: test__tzcnt_u32:
; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: cmpl $0, %eax
-; X32-NEXT: jne .LBB6_1
-; X32-NEXT: # %bb.2:
-; X32-NEXT: movl $32, %eax
-; X32-NEXT: retl
-; X32-NEXT: .LBB6_1:
-; X32-NEXT: tzcntl %eax, %eax
+; X32-NEXT: tzcntl {{[0-9]+}}(%esp), %eax
; X32-NEXT: retl
;
; X64-LABEL: test__tzcnt_u32:
; X64: # %bb.0:
-; X64-NEXT: tzcntl %edi, %ecx
-; X64-NEXT: movl $32, %eax
-; X64-NEXT: cmovael %ecx, %eax
+; X64-NEXT: tzcntl %edi, %eax
; X64-NEXT: retq
%cmp = icmp ne i32 %a0, 0
- %cttz = call i32 @llvm.cttz.i32(i32 %a0, i1 true)
- %res = select i1 %cmp, i32 %cttz, i32 32
- ret i32 %res
+ %cttz = call i32 @llvm.cttz.i32(i32 %a0, i1 false)
+ ret i32 %cttz
}
;
@@ -163,30 +140,17 @@ define i32 @test__tzcnt_u32(i32 %a0) {
define i16 @test_tzcnt_u16(i16 %a0) {
; X32-LABEL: test_tzcnt_u16:
; X32: # %bb.0:
-; X32-NEXT: movzwl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: movzwl %ax, %ecx
-; X32-NEXT: cmpl $0, %ecx
-; X32-NEXT: jne .LBB7_1
-; X32-NEXT: # %bb.2:
-; X32-NEXT: movw $16, %ax
-; X32-NEXT: retl
-; X32-NEXT: .LBB7_1:
-; X32-NEXT: tzcntw %ax, %ax
+; X32-NEXT: tzcntw {{[0-9]+}}(%esp), %ax
; X32-NEXT: retl
;
; X64-LABEL: test_tzcnt_u16:
; X64: # %bb.0:
-; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: tzcntw %ax, %cx
-; X64-NEXT: cmpl $0, %eax
-; X64-NEXT: movw $16, %ax
-; X64-NEXT: cmovnew %cx, %ax
+; X64-NEXT: tzcntw %di, %ax
; X64-NEXT: retq
%zext = zext i16 %a0 to i32
%cmp = icmp ne i32 %zext, 0
- %cttz = call i16 @llvm.cttz.i16(i16 %a0, i1 true)
- %res = select i1 %cmp, i16 %cttz, i16 16
- ret i16 %res
+ %cttz = call i16 @llvm.cttz.i16(i16 %a0, i1 false)
+ ret i16 %cttz
}
define i32 @test_andn_u32(i32 %a0, i32 %a1) {
@@ -299,26 +263,16 @@ define i32 @test_blsr_u32(i32 %a0) {
define i32 @test_tzcnt_u32(i32 %a0) {
; X32-LABEL: test_tzcnt_u32:
; X32: # %bb.0:
-; X32-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X32-NEXT: cmpl $0, %eax
-; X32-NEXT: jne .LBB13_1
-; X32-NEXT: # %bb.2:
-; X32-NEXT: movl $32, %eax
-; X32-NEXT: retl
-; X32-NEXT: .LBB13_1:
-; X32-NEXT: tzcntl %eax, %eax
+; X32-NEXT: tzcntl {{[0-9]+}}(%esp), %eax
; X32-NEXT: retl
;
; X64-LABEL: test_tzcnt_u32:
; X64: # %bb.0:
-; X64-NEXT: tzcntl %edi, %ecx
-; X64-NEXT: movl $32, %eax
-; X64-NEXT: cmovael %ecx, %eax
+; X64-NEXT: tzcntl %edi, %eax
; X64-NEXT: retq
%cmp = icmp ne i32 %a0, 0
- %cttz = call i32 @llvm.cttz.i32(i32 %a0, i1 true)
- %res = select i1 %cmp, i32 %cttz, i32 32
- ret i32 %res
+ %cttz = call i32 @llvm.cttz.i32(i32 %a0, i1 false)
+ ret i32 %cttz
}
declare i16 @llvm.cttz.i16(i16, i1)
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