[PATCH] D52555: [X86] Avoid SSE1 registers for memory operations if no-x87.

[Nick Desaulniers via Phabricator via llvm-commits]

nickdesaulniers added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:1922-1952
   if (!F.hasFnAttribute(Attribute::NoImplicitFloat)) {
     if (Size >= 16 &&
         (!Subtarget.isUnalignedMem16Slow() ||
          ((DstAlign == 0 || DstAlign >= 16) &&
           (SrcAlign == 0 || SrcAlign >= 16)))) {
       // FIXME: Check if unaligned 32-byte accesses are slow.
       if (Size >= 32 && Subtarget.hasAVX()) {
----------------
This whole block should be guarded from trying to use fp registers if the target does not have x87.  The current patch overfits our bizarro test case.

Can you then add test cases for other combinations:
+avx,-x87, size >32 (L1928)
+sse2,-x87 (L1936)
+sse2,-x87,memcpy > 8B, i686 (L1942)


Repository:
  rL LLVM

https://reviews.llvm.org/D52555