[PATCH] D52467: [PowerPC] [NFC] Refactor code for printing register operands
Nemanja Ivanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 25 20:05:04 PDT 2018
nemanjai added inline comments.
================
Comment at: lib/Target/PowerPC/PPCAsmPrinter.cpp:282
return false;
}
}
----------------
jsji wrote:
> Patch not up to date? Need to also update code from https://reviews.llvm.org/D52244.
I'll certainly rebase it on top of that patch, but I am not really modifying this code.
================
Comment at: lib/Target/PowerPC/PPCInstrInfo.h:415
+ static unsigned getRegNumForOperand(const MCInstrDesc &Desc, unsigned Reg,
+ unsigned OpNo) {
+ if (Desc.TSFlags & PPCII::UseVSXReg) {
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inouehrs wrote:
> Why do we need `OpNo`? There is no use of this parameter.
>
There is currently no use for this parameter. But various pseudo-instructions we may need to add in the future may have different numbering schemes for different operands.
For example, I could implement something like this:
`mypseudo VRT, XA, VRA` which would do something on vector registers and `XA` is a 6-bit VSX register number, whereas `VRT, VRA` are 5-bit VMX register numbers.
Repository:
rL LLVM
https://reviews.llvm.org/D52467
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