[PATCH] D52490: [AArch64][v8.5A] Add Memory Tagging instructions

[Evgenii Stepanov via Phabricator via llvm-commits]

eugenis accepted this revision.
eugenis added a comment.
This revision is now accepted and ready to land.

LGTM with nit



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Comment at: lib/Target/AArch64/AArch64InstrInfo.td:1170
+let isCodeGenOnly=1, mayStore=1 in {
+def SetTagRangeLoopImm
+    : Pseudo<(outs GPR64common:$Rm, GPR64sp:$Rn_wback), (ins i64imm:$sz, GPR64sp:$Rn),
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Do you need the pseudos in this patch?


Repository:
  rL LLVM

https://reviews.llvm.org/D52490