[PATCH] D51932: [AMDGPU] Fix-up cases where writelane has 2 SGPR operands

[David Stuttard via Phabricator via llvm-commits]

dstuttard added a comment.

In https://reviews.llvm.org/D51932#1236779, @arsenm wrote:

> I don't actually understand why this code is where it is? Why is SIFixSGPRCopies doing this? To clarify is this just an optimization? My initial reaction was that it was a fix, but looking at it again it seems like an optimization to me


It isn't an optimization - it's a bug. We encountered this in graphics shaders - hence the requirement for the fix.

SIFixSGPRCopies does feel like a strange place to put this fix. It has to be somewhere late enough to catch the issue since it's a transformation that happens after isel that causes the problem in this case. Have you got any other suggestions as to where it could go instead? FixSGPR copies isn't perfect, but doesn't seem too unreasonable as it is an SGPR related fix-up.


Repository:
  rL LLVM

https://reviews.llvm.org/D51932