[llvm] r342755 - [x86] add test with optsize attribute for scalar->vector transform; NFC

[Sanjay Patel via llvm-commits]

Author: spatel
Date: Fri Sep 21 11:03:49 2018
New Revision: 342755

URL: http://llvm.org/viewvc/llvm-project?rev=342755&view=rev
Log:
[x86] add test with optsize attribute for scalar->vector transform; NFC

Modified:
    llvm/trunk/test/CodeGen/X86/load-scalar-as-vector.ll

Modified: llvm/trunk/test/CodeGen/X86/load-scalar-as-vector.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/load-scalar-as-vector.ll?rev=342755&r1=342754&r2=342755&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/load-scalar-as-vector.ll (original)
+++ llvm/trunk/test/CodeGen/X86/load-scalar-as-vector.ll Fri Sep 21 11:03:49 2018
@@ -24,6 +24,26 @@ define <4 x i32> @add_op1_constant(i32*
   ret <4 x i32> %r
 }
 
+define <4 x i32> @add_op1_constant_optsize(i32* %p) nounwind optsize {
+; SSE-LABEL: add_op1_constant_optsize:
+; SSE:       # %bb.0:
+; SSE-NEXT:    movl (%rdi), %eax
+; SSE-NEXT:    addl $42, %eax
+; SSE-NEXT:    movd %eax, %xmm0
+; SSE-NEXT:    retq
+;
+; AVX-LABEL: add_op1_constant_optsize:
+; AVX:       # %bb.0:
+; AVX-NEXT:    movl (%rdi), %eax
+; AVX-NEXT:    addl $42, %eax
+; AVX-NEXT:    vmovd %eax, %xmm0
+; AVX-NEXT:    retq
+  %x = load i32, i32* %p
+  %b = add i32 %x, 42
+  %r = insertelement <4 x i32> undef, i32 %b, i32 0
+  ret <4 x i32> %r
+}
+
 define <8 x i16> @add_op0_constant(i16* %p) nounwind {
 ; SSE-LABEL: add_op0_constant:
 ; SSE:       # %bb.0: