[PATCH] D52202: [ELF] Use the Repl point to avoid the segfault when using ICF
Petr Hosek via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 20 11:52:01 PDT 2018
phosek updated this revision to Diff 166341.
Repository:
rLLD LLVM Linker
https://reviews.llvm.org/D52202
Files:
lld/ELF/InputSection.cpp
lld/test/ELF/emit-relocs-icf1.s
lld/test/ELF/emit-relocs-icf2.s
Index: lld/test/ELF/emit-relocs-icf2.s
===================================================================
--- /dev/null
+++ lld/test/ELF/emit-relocs-icf2.s
@@ -0,0 +1,36 @@
+# REQUIRES: x86
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t.o
+# RUN: ld.lld --gc-sections --emit-relocs --icf=all %t.o -o %t
+# RUN: llvm-readobj -r %t | FileCheck %s
+
+# CHECK: Relocations [
+# CHECK-NEXT: Section (3) .rela.text {
+# CHECK-NEXT: 0x201000 R_X86_64_64 .text 0x11
+# CHECK-NEXT: 0x201008 R_X86_64_64 .text 0x11
+# CHECK-NEXT: 0x201011 R_X86_64_64 .rodata 0x0
+# CHECK-NEXT: }
+# CHECK-NEXT: ]
+
+.rodata
+quux:
+.quad 0xfe
+
+.section .text.foo,"ax"
+foo:
+.quad quux
+
+.section .text.bar,"ax"
+bar:
+.quad quux
+
+.section .text.baz,"ax"
+baz:
+.quad quux
+
+.text
+.quad foo
+.quad bar
+
+.global _start
+_start:
+ nop
Index: lld/test/ELF/emit-relocs-icf1.s
===================================================================
--- /dev/null
+++ lld/test/ELF/emit-relocs-icf1.s
@@ -0,0 +1,32 @@
+# REQUIRES: x86
+# RUN: llvm-mc -filetype=obj -triple=x86_64-unknown-linux %s -o %t.o
+# RUN: ld.lld --emit-relocs --icf=all %t.o -o %t
+# RUN: llvm-readobj -r %t | FileCheck %s
+
+# CHECK: Relocations [
+# CHECK-NEXT: Section (3) .rela.text {
+# CHECK-NEXT: 0x201000 R_X86_64_64 .text 0x11
+# CHECK-NEXT: 0x201008 R_X86_64_64 .text 0x11
+# CHECK-NEXT: 0x201011 R_X86_64_64 .rodata 0x0
+# CHECK-NEXT: }
+# CHECK-NEXT: ]
+
+.rodata
+quux:
+.quad 0xfe
+
+.section .text.foo,"ax"
+foo:
+.quad quux
+
+.section .text.bar,"ax"
+bar:
+.quad quux
+
+.text
+.quad foo
+.quad bar
+
+.global _start
+_start:
+ nop
Index: lld/ELF/InputSection.cpp
===================================================================
--- lld/ELF/InputSection.cpp
+++ lld/ELF/InputSection.cpp
@@ -402,7 +402,7 @@
}
if (RelTy::IsRela)
- P->r_addend = Sym.getVA(Addend) - Section->getOutputSection()->Addr;
+ P->r_addend = Sym.getVA(Addend) - Section->Repl->getOutputSection()->Addr;
else if (Config->Relocatable)
Sec->Relocations.push_back({R_ABS, Type, Rel.r_offset, Addend, &Sym});
}
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