[www-releases] r342530 - 7.0.0 files

[Hans Wennborg via llvm-commits]

Author: hans
Date: Wed Sep 19 02:40:08 2018
New Revision: 342530

URL: http://llvm.org/viewvc/llvm-project?rev=342530&view=rev
Log:
7.0.0 files

Added:
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--- www-releases/trunk/7.0.0/LICENSE.TXT (added)
+++ www-releases/trunk/7.0.0/LICENSE.TXT Wed Sep 19 02:40:08 2018
@@ -0,0 +1,68 @@
+==============================================================================
+LLVM Release License
+==============================================================================
+University of Illinois/NCSA
+Open Source License
+
+Copyright (c) 2003-2018 University of Illinois at Urbana-Champaign.
+All rights reserved.
+
+Developed by:
+
+    LLVM Team
+
+    University of Illinois at Urbana-Champaign
+
+    http://llvm.org
+
+Permission is hereby granted, free of charge, to any person obtaining a copy of
+this software and associated documentation files (the "Software"), to deal with
+the Software without restriction, including without limitation the rights to
+use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies
+of the Software, and to permit persons to whom the Software is furnished to do
+so, subject to the following conditions:
+
+    * Redistributions of source code must retain the above copyright notice,
+      this list of conditions and the following disclaimers.
+
+    * Redistributions in binary form must reproduce the above copyright notice,
+      this list of conditions and the following disclaimers in the
+      documentation and/or other materials provided with the distribution.
+
+    * Neither the names of the LLVM Team, University of Illinois at
+      Urbana-Champaign, nor the names of its contributors may be used to
+      endorse or promote products derived from this Software without specific
+      prior written permission.
+
+THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
+CONTRIBUTORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS WITH THE
+SOFTWARE.
+
+==============================================================================
+Copyrights and Licenses for Third Party Software Distributed with LLVM:
+==============================================================================
+The LLVM software contains code written by third parties.  Such software will
+have its own individual LICENSE.TXT file in the directory in which it appears.
+This file will describe the copyrights, license, and restrictions which apply
+to that code.
+
+The disclaimer of warranty in the University of Illinois Open Source License
+applies to all code in the LLVM Distribution, and nothing in any of the
+other licenses gives permission to use the names of the LLVM Team or the
+University of Illinois to endorse or promote products derived from this
+Software.
+
+The following pieces of software have additional or alternate copyrights,
+licenses, and/or restrictions:
+
+Program             Directory
+-------             ---------
+Google Test         llvm/utils/unittest/googletest
+OpenBSD regex       llvm/lib/Support/{reg*, COPYRIGHT.regex}
+pyyaml tests        llvm/test/YAMLParser/{*.data, LICENSE.TXT}
+ARM contributions   llvm/lib/Target/ARM/LICENSE.TXT
+md5 contributions   llvm/lib/Support/MD5.cpp llvm/include/llvm/Support/MD5.h

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+# This file hashes the configuration used when building these files. When it is not found, a full rebuild will be done.
+config: 3d2f0a3fb2175a4c6db03e28dd703e4c
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==============================================================================
--- www-releases/trunk/7.0.0/docs/AMDGPUAsmGFX7.html (added)
+++ www-releases/trunk/7.0.0/docs/AMDGPUAsmGFX7.html Wed Sep 19 02:40:08 2018
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+
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+
+<html xmlns="http://www.w3.org/1999/xhtml">
+  <head>
+    <meta http-equiv="Content-Type" content="text/html; charset=utf-8" />
+    <title>Syntax of GFX7 Instructions — LLVM 7 documentation</title>
+    <link rel="stylesheet" href="_static/llvm-theme.css" type="text/css" />
+    <link rel="stylesheet" href="_static/pygments.css" type="text/css" />
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+    <script type="text/javascript" src="_static/underscore.js"></script>
+    <script type="text/javascript" src="_static/doctools.js"></script>
+    <link rel="index" title="Index" href="genindex.html" />
+    <link rel="search" title="Search" href="search.html" />
+    <link rel="next" title="Syntax of GFX8 Instructions" href="AMDGPUAsmGFX8.html" />
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+<style type="text/css">
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+  table.right td { border: 1px solid #ccc; }
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+<div class="logo">
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+    <img src="_static/logo.png"
+         alt="LLVM Logo" width="250" height="88"/></a>
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+    <div class="document">
+      <div class="documentwrapper">
+          <div class="body" role="main">
+            
+  <div class="section" id="syntax-of-gfx7-instructions">
+<h1>Syntax of GFX7 Instructions<a class="headerlink" href="#syntax-of-gfx7-instructions" title="Permalink to this headline">¶</a></h1>
+<div class="contents local topic" id="contents">
+<ul class="simple">
+<li><a class="reference internal" href="#ds" id="id1">DS</a></li>
+<li><a class="reference internal" href="#exp" id="id2">EXP</a></li>
+<li><a class="reference internal" href="#flat" id="id3">FLAT</a></li>
+<li><a class="reference internal" href="#mimg" id="id4">MIMG</a></li>
+<li><a class="reference internal" href="#mubuf" id="id5">MUBUF</a></li>
+<li><a class="reference internal" href="#smrd" id="id6">SMRD</a></li>
+<li><a class="reference internal" href="#sop1" id="id7">SOP1</a></li>
+<li><a class="reference internal" href="#sop2" id="id8">SOP2</a></li>
+<li><a class="reference internal" href="#sopc" id="id9">SOPC</a></li>
+<li><a class="reference internal" href="#sopk" id="id10">SOPK</a></li>
+<li><a class="reference internal" href="#sopp" id="id11">SOPP</a></li>
+<li><a class="reference internal" href="#vintrp" id="id12">VINTRP</a></li>
+<li><a class="reference internal" href="#vop1" id="id13">VOP1</a></li>
+<li><a class="reference internal" href="#vop2" id="id14">VOP2</a></li>
+<li><a class="reference internal" href="#vop3" id="id15">VOP3</a></li>
+<li><a class="reference internal" href="#vopc" id="id16">VOPC</a></li>
+</ul>
+</div>
+<div class="section" id="ds">
+<h2><a class="toc-backref" href="#id1">DS</a><a class="headerlink" href="#ds" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+ds_add_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_b32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_b64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_rtn_b32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_rtn_b64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_src2_b32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_src2_b64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_append                      dst                            <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_b32                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_b64                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_f32                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_f64                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_rtn_b32               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_rtn_b64               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_rtn_f32               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_rtn_f64               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_condxchg32_rtn_b64          dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_consume                     dst                            <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_barrier                 src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_init                    src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_sema_br                 src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_sema_p                  src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_sema_release_all        src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_sema_v                  src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_f32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_f64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_i32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_i64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_f32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_f64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_i32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_i64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_f32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_f64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_i32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_i64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_f32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_f64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_i32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_i64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_f32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_f64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_i32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_i64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_f32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_f64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_i32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_i64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_mskor_b32                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_mskor_b64                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_mskor_rtn_b32               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_mskor_rtn_b64               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_nop                         src0
+ds_or_b32                      src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_or_b64                      src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_or_rtn_b32                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_or_rtn_b64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_or_src2_b32                 src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_or_src2_b64                 src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_ordered_count               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read2_b32                   dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read2_b64                   dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read2st64_b32               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read2st64_b64               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_b128                   dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_b32                    dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_b64                    dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_b96                    dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_i16                    dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_i8                     dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_u16                    dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_u8                     dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_rtn_u32                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_rtn_u64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_src2_u32               src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_src2_u64               src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_u32                    src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_u64                    src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_swizzle_b32                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-sw-offset16"><span class="std std-ref">sw_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrap_rtn_b32                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write2_b32                  src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write2_b64                  src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write2st64_b32              src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write2st64_b64              src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b128                  src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b16                   src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b32                   src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b64                   src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b8                    src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b96                   src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_src2_b32              src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_src2_b64              src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg2_rtn_b32             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg2_rtn_b64             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg2st64_rtn_b32         dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg2st64_rtn_b64         dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg_rtn_b32              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg_rtn_b64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_b32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_b64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_rtn_b32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_rtn_b64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_src2_b32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_src2_b64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+</pre>
+</div>
+<div class="section" id="exp">
+<h2><a class="toc-backref" href="#id2">EXP</a><a class="headerlink" href="#exp" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+exp                            dst, src0, src1, src2, src3    <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-done"><span class="std std-ref">done</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-compr"><span class="std std-ref">compr</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-vm"><span class="std std-ref">vm</span></a>
+</pre>
+</div>
+<div class="section" id="flat">
+<h2><a class="toc-backref" href="#id3">FLAT</a><a class="headerlink" href="#flat" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+flat_atomic_add                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_add_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_and                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_and_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_cmpswap            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_cmpswap_x2         dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_dec                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_dec_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_fcmpswap           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_fcmpswap_x2        dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_fmax               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_fmax_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_fmin               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_fmin_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_inc                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_inc_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_or                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_or_x2              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_smax               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_smax_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_smin               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_smin_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_sub                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_sub_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_swap               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_swap_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_umax               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_umax_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_umin               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_umin_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_xor                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_xor_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_dword                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_dwordx2              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_dwordx3              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_dwordx4              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_sbyte                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_sshort               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_ubyte                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_ushort               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_byte                src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_dword               src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_dwordx2             src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_dwordx3             src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_dwordx4             src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_short               src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+</pre>
+</div>
+<div class="section" id="mimg">
+<h2><a class="toc-backref" href="#id4">MIMG</a><a class="headerlink" href="#mimg" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+image_atomic_add               src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_and               src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_cmpswap           src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_dec               src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_inc               src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_or                src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_smax              src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_smin              src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_sub               src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_swap              src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_umax              src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_umin              src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_xor               src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4                  dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_b                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_b_cl             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_b_cl_o           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_b_o              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c_b              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c_b_cl           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c_b_cl_o         dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c_b_o            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c_cl             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c_cl_o           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c_l              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c_l_o            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c_lz             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c_lz_o           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_c_o              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_cl               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_cl_o             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_l                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_l_o              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_lz               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_lz_o             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4_o                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_get_lod                  dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_get_resinfo              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_load                     dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_load_mip                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_load_mip_pck             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_load_mip_pck_sgn         dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_load_pck                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_load_pck_sgn             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample                   dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_b                 dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_b_cl              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_c                 dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_c_b               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_c_b_cl            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_c_cd              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_c_cl              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_c_d               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_c_l               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_c_lz              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_cl                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_l                 dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample_lz                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_store                    src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_store_mip                src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_store_mip_pck            src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_store_pck                src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+</pre>
+</div>
+<div class="section" id="mubuf">
+<h2><a class="toc-backref" href="#id5">MUBUF</a><a class="headerlink" href="#mubuf" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+buffer_atomic_add              src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_add_x2           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_and              src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_and_x2           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_cmpswap          src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_cmpswap_x2       src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_dec              src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_dec_x2           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_inc              src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_inc_x2           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_or               src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_or_x2            src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_smax             src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_smax_x2          src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_smin             src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_smin_x2          src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_sub              src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_sub_x2           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_swap             src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_swap_x2          src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_umax             src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_umax_x2          src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_umin             src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_umin_x2          src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_xor              src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_xor_x2           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_dword              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_load_dwordx2            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_dwordx3            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_dwordx4            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_format_x           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_load_format_xy          dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_format_xyz         dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_format_xyzw        dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_sbyte              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_load_sshort             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_load_ubyte              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_load_ushort             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_store_byte              src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_dword             src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_dwordx2           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_dwordx3           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_dwordx4           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_x          src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_xy         src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_xyz        src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_xyzw       src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_short             src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-addr64"><span class="std std-ref">addr64</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_wbinvl1
+buffer_wbinvl1_vol
+</pre>
+</div>
+<div class="section" id="smrd">
+<h2><a class="toc-backref" href="#id6">SMRD</a><a class="headerlink" href="#smrd" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">s_buffer_load_dword</span>            <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_buffer_load_dwordx16</span>         <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_buffer_load_dwordx2</span>          <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_buffer_load_dwordx4</span>          <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_buffer_load_dwordx8</span>          <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_dcache_inv</span>
+<span class="n">s_dcache_inv_vol</span>
+<span class="n">s_load_dword</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_load_dwordx16</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_load_dwordx2</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_load_dwordx4</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_load_dwordx8</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_memtime</span>                      <span class="n">dst</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="sop1">
+<h2><a class="toc-backref" href="#id7">SOP1</a><a class="headerlink" href="#sop1" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">s_abs_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_and_saveexec_b64</span>             <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_andn2_saveexec_b64</span>           <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bcnt0_i32_b32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bcnt0_i32_b64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bcnt1_i32_b32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bcnt1_i32_b64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bitset0_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bitset0_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bitset1_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bitset1_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_brev_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_brev_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_cbranch_join</span>                 <span class="n">src0</span>
+<span class="n">s_cmov_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_cmov_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_ff0_i32_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_ff0_i32_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_ff1_i32_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_ff1_i32_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_flbit_i32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_flbit_i32_b32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_flbit_i32_b64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_flbit_i32_i64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_getpc_b64</span>                    <span class="n">dst</span>
+<span class="n">s_mov_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_mov_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_mov_fed_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_movreld_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_movreld_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_movrels_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_movrels_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_nand_saveexec_b64</span>            <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_nor_saveexec_b64</span>             <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_not_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_not_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_or_saveexec_b64</span>              <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_orn2_saveexec_b64</span>            <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_quadmask_b32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_quadmask_b64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_rfe_b64</span>                      <span class="n">src0</span>
+<span class="n">s_setpc_b64</span>                    <span class="n">src0</span>
+<span class="n">s_sext_i32_i16</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_sext_i32_i8</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_swappc_b64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_wqm_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_wqm_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_xnor_saveexec_b64</span>            <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_xor_saveexec_b64</span>             <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="sop2">
+<h2><a class="toc-backref" href="#id8">SOP2</a><a class="headerlink" href="#sop2" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">s_absdiff_i32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_add_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_add_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_addc_u32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_and_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_and_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_andn2_b32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_andn2_b64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_ashr_i32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_ashr_i64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfe_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfe_i64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfe_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfe_u64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfm_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfm_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cbranch_g_fork</span>               <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cselect_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cselect_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_lshl_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_lshl_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_lshr_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_lshr_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_max_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_max_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_min_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_min_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_mul_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_nand_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_nand_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_nor_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_nor_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_or_b32</span>                       <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_or_b64</span>                       <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_orn2_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_orn2_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_sub_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_sub_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_subb_u32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_xnor_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_xnor_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_xor_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_xor_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="sopc">
+<h2><a class="toc-backref" href="#id9">SOPC</a><a class="headerlink" href="#sopc" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">s_bitcmp0_b32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bitcmp0_b64</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bitcmp1_b32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bitcmp1_b64</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_eq_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_eq_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_ge_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_ge_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_gt_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_gt_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_le_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_le_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_lg_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_lg_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_lt_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_lt_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_setvskip</span>                     <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="sopk">
+<h2><a class="toc-backref" href="#id10">SOPK</a><a class="headerlink" href="#sopk" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">s_addk_i32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_cbranch_i_fork</span>               <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmovk_i32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_cmpk_eq_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_eq_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_ge_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_ge_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_gt_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_gt_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_le_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_le_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_lg_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_lg_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_lt_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_lt_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_getreg_b32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_movk_i32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_mulk_i32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_setreg_b32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_setreg_imm32_b32</span>             <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="sopp">
+<h2><a class="toc-backref" href="#id11">SOPP</a><a class="headerlink" href="#sopp" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">s_barrier</span>
+<span class="n">s_branch</span>                       <span class="n">src0</span>
+<span class="n">s_cbranch_cdbgsys</span>              <span class="n">src0</span>
+<span class="n">s_cbranch_cdbgsys_and_user</span>     <span class="n">src0</span>
+<span class="n">s_cbranch_cdbgsys_or_user</span>      <span class="n">src0</span>
+<span class="n">s_cbranch_cdbguser</span>             <span class="n">src0</span>
+<span class="n">s_cbranch_execnz</span>               <span class="n">src0</span>
+<span class="n">s_cbranch_execz</span>                <span class="n">src0</span>
+<span class="n">s_cbranch_scc0</span>                 <span class="n">src0</span>
+<span class="n">s_cbranch_scc1</span>                 <span class="n">src0</span>
+<span class="n">s_cbranch_vccnz</span>                <span class="n">src0</span>
+<span class="n">s_cbranch_vccz</span>                 <span class="n">src0</span>
+<span class="n">s_decperflevel</span>                 <span class="n">src0</span>
+<span class="n">s_endpgm</span>
+<span class="n">s_icache_inv</span>
+<span class="n">s_incperflevel</span>                 <span class="n">src0</span>
+<span class="n">s_nop</span>                          <span class="n">src0</span>
+<span class="n">s_sendmsg</span>                      <span class="n">src0</span>
+<span class="n">s_sendmsghalt</span>                  <span class="n">src0</span>
+<span class="n">s_sethalt</span>                      <span class="n">src0</span>
+<span class="n">s_setkill</span>                      <span class="n">src0</span>
+<span class="n">s_setprio</span>                      <span class="n">src0</span>
+<span class="n">s_sleep</span>                        <span class="n">src0</span>
+<span class="n">s_trap</span>                         <span class="n">src0</span>
+<span class="n">s_ttracedata</span>
+<span class="n">s_waitcnt</span>                      <span class="n">src0</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="vintrp">
+<h2><a class="toc-backref" href="#id12">VINTRP</a><a class="headerlink" href="#vintrp" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">v_interp_mov_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_interp_p1_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_interp_p2_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="vop1">
+<h2><a class="toc-backref" href="#id13">VOP1</a><a class="headerlink" href="#vop1" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">v_bfrev_b32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_ceil_f32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_ceil_f64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_clrexcp</span>
+<span class="n">v_cos_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f16_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f32_f16</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f32_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f32_i32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f32_u32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f32_ubyte0</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f32_ubyte1</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f32_ubyte2</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f32_ubyte3</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f64_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f64_i32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_f64_u32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_flr_i32_f32</span>              <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_i32_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_i32_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_off_f32_i4</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_rpi_i32_f32</span>              <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_u32_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_cvt_u32_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_exp_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_exp_legacy_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_ffbh_i32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_ffbh_u32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_ffbl_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_floor_f32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_floor_f64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_fract_f32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_fract_f64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_frexp_exp_i32_f32</span>            <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_frexp_exp_i32_f64</span>            <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_frexp_mant_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_frexp_mant_f64</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_log_clamp_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_log_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_log_legacy_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_mov_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_mov_fed_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_movreld_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_movrels_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_movrelsd_b32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_nop</span>
+<span class="n">v_not_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rcp_clamp_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rcp_clamp_f64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rcp_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rcp_f64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rcp_iflag_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rcp_legacy_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_readfirstlane_b32</span>            <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rndne_f32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rndne_f64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rsq_clamp_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rsq_clamp_f64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rsq_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rsq_f64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_rsq_legacy_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_sin_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_sqrt_f32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_sqrt_f64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_trunc_f32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">v_trunc_f64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="vop2">
+<h2><a class="toc-backref" href="#id14">VOP2</a><a class="headerlink" href="#vop2" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">v_add_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_add_i32</span>                      <span class="n">dst0</span><span class="p">,</span> <span class="n">dst1</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_addc_u32</span>                     <span class="n">dst0</span><span class="p">,</span> <span class="n">dst1</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span><span class="p">,</span> <span class="n">src2</span>
+<span class="n">v_and_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_ashr_i32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_ashrrev_i32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_bcnt_u32_b32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_bfm_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cndmask_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span><span class="p">,</span> <span class="n">src2</span>
+<span class="n">v_cvt_pk_i16_i32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cvt_pk_u16_u32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cvt_pkaccum_u8_f32</span>           <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cvt_pknorm_i16_f32</span>           <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cvt_pknorm_u16_f32</span>           <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cvt_pkrtz_f16_f32</span>            <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_ldexp_f32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_lshl_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_lshlrev_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_lshr_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_lshrrev_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_mac_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_mac_legacy_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_madak_f32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span><span class="p">,</span> <span class="n">src2</span>
+<span class="n">v_madmk_f32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span><span class="p">,</span> <span class="n">src2</span>
+<span class="n">v_max_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_max_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_max_legacy_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_max_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_mbcnt_hi_u32_b32</span>             <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_mbcnt_lo_u32_b32</span>             <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_min_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_min_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_min_legacy_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_min_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_mul_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_mul_hi_i32_i24</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_mul_hi_u32_u24</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_mul_i32_i24</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_mul_legacy_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_mul_u32_u24</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_or_b32</span>                       <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_readlane_b32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_sub_f32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_sub_i32</span>                      <span class="n">dst0</span><span class="p">,</span> <span class="n">dst1</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_subb_u32</span>                     <span class="n">dst0</span><span class="p">,</span> <span class="n">dst1</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span><span class="p">,</span> <span class="n">src2</span>
+<span class="n">v_subbrev_u32</span>                  <span class="n">dst0</span><span class="p">,</span> <span class="n">dst1</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span><span class="p">,</span> <span class="n">src2</span>
+<span class="n">v_subrev_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_subrev_i32</span>                   <span class="n">dst0</span><span class="p">,</span> <span class="n">dst1</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_writelane_b32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_xor_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="vop3">
+<h2><a class="toc-backref" href="#id15">VOP3</a><a class="headerlink" href="#vop3" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+v_add_f32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_add_f64                      dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_add_i32_e64                  dst0, dst1, src0, src1         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_addc_u32_e64                 dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_alignbit_b32                 dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_alignbyte_b32                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_and_b32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ashr_i32_e64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ashr_i64                     dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ashrrev_i32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bcnt_u32_b32_e64             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bfe_i32                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bfe_u32                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bfi_b32                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bfm_b32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bfrev_b32_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ceil_f32_e64                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ceil_f64_e64                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_clrexcp_e64                                                 <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_class_f32_e64            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_class_f64_e64            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_f32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_f64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_i32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_u32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_u64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_f_f32_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_f_f64_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmp_f_i64_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmp_f_u64_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmp_ge_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmp_gt_f64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_gt_i32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_gt_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmp_gt_u64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmp_le_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmp_lg_f64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmp_lt_f64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmp_lt_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_subrev_i32_e64               dst0, dst1, src0, src1         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_trig_preop_f64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_trunc_f32_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_trunc_f64_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_xor_b32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+</pre>
+</div>
+<div class="section" id="vopc">
+<h2><a class="toc-backref" href="#id16">VOPC</a><a class="headerlink" href="#vopc" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">v_cmp_class_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_class_f64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_eq_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_eq_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_eq_i32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_eq_i64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_eq_u32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_eq_u64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_f_f32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_f_f64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_f_i32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_f_i64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_f_u32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_f_u64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ge_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ge_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ge_i32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ge_i64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ge_u32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ge_u64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_gt_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_gt_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_gt_i32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_gt_i64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_gt_u32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_gt_u64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_le_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_le_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_le_i32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_le_i64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_le_u32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_le_u64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_lg_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_lg_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_lt_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_lt_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_lt_i32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_lt_i64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_lt_u32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_lt_u64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ne_i32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ne_i64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ne_u32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ne_u64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_neq_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_neq_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_nge_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_nge_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ngt_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_ngt_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_nle_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_nle_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_nlg_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_nlg_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_nlt_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_nlt_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_o_f32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_o_f64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_t_i32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_t_i64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_t_u32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_t_u64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_tru_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_tru_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_u_f32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmp_u_f64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_eq_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_eq_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_f_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_f_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_ge_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_ge_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_gt_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_gt_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_le_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_le_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_lg_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_lg_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_lt_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_lt_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_neq_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_neq_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_nge_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_nge_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_ngt_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_ngt_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_nle_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_nle_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_nlg_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_nlg_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_nlt_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_nlt_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_o_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_o_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_tru_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_tru_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_u_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmps_u_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_eq_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_eq_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_f_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_f_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_ge_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_ge_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_gt_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_gt_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
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+<span class="n">v_cmpsx_le_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
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+<span class="n">v_cmpsx_lg_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_lt_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_lt_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_neq_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_neq_f64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_nge_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_nge_f64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_ngt_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_ngt_f64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_nle_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_nle_f64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_nlg_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_nlg_f64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_nlt_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_nlt_f64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_o_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_o_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_tru_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_tru_f64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_u_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpsx_u_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_class_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_class_f64</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_eq_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_eq_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_eq_i32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_eq_i64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_eq_u32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_eq_u64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_f_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_f_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_f_i32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_f_i64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_f_u32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_f_u64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ge_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ge_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ge_i32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ge_i64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ge_u32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ge_u64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_gt_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_gt_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_gt_i32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_gt_i64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_gt_u32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_gt_u64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_le_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_le_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_le_i32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_le_i64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_le_u32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_le_u64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_lg_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_lg_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_lt_f32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_lt_f64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_lt_i32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_lt_i64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_lt_u32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_lt_u64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ne_i32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ne_i64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ne_u32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ne_u64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_neq_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_neq_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_nge_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_nge_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ngt_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_ngt_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_nle_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_nle_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_nlg_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_nlg_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_nlt_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_nlt_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_o_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_o_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_t_i32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_t_i64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_t_u32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_t_u64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_tru_f32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_tru_f64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_u_f32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_cmpx_u_f64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+</pre></div>
+</div>
+</div>
+</div>
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Added: www-releases/trunk/7.0.0/docs/AMDGPUAsmGFX8.html
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@@ -0,0 +1,1761 @@
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+
+          <li class="nav-item nav-item-1"><a href="AMDGPUUsage.html" accesskey="U">User Guide for AMDGPU Backend</a> »</li> 
+      </ul>
+    </div>
+
+
+    <div class="document">
+      <div class="documentwrapper">
+          <div class="body" role="main">
+            
+  <div class="section" id="syntax-of-gfx8-instructions">
+<h1>Syntax of GFX8 Instructions<a class="headerlink" href="#syntax-of-gfx8-instructions" title="Permalink to this headline">¶</a></h1>
+<div class="contents local topic" id="contents">
+<ul class="simple">
+<li><a class="reference internal" href="#ds" id="id1">DS</a></li>
+<li><a class="reference internal" href="#exp" id="id2">EXP</a></li>
+<li><a class="reference internal" href="#flat" id="id3">FLAT</a></li>
+<li><a class="reference internal" href="#mimg" id="id4">MIMG</a></li>
+<li><a class="reference internal" href="#mubuf" id="id5">MUBUF</a></li>
+<li><a class="reference internal" href="#smem" id="id6">SMEM</a></li>
+<li><a class="reference internal" href="#sop1" id="id7">SOP1</a></li>
+<li><a class="reference internal" href="#sop2" id="id8">SOP2</a></li>
+<li><a class="reference internal" href="#sopc" id="id9">SOPC</a></li>
+<li><a class="reference internal" href="#sopk" id="id10">SOPK</a></li>
+<li><a class="reference internal" href="#sopp" id="id11">SOPP</a></li>
+<li><a class="reference internal" href="#vintrp" id="id12">VINTRP</a></li>
+<li><a class="reference internal" href="#vop1" id="id13">VOP1</a></li>
+<li><a class="reference internal" href="#vop2" id="id14">VOP2</a></li>
+<li><a class="reference internal" href="#vop3" id="id15">VOP3</a></li>
+<li><a class="reference internal" href="#vopc" id="id16">VOPC</a></li>
+</ul>
+</div>
+<div class="section" id="ds">
+<h2><a class="toc-backref" href="#id1">DS</a><a class="headerlink" href="#ds" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+ds_add_f32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_rtn_f32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_src2_f32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_add_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_b32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_b64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_rtn_b32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_rtn_b64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_src2_b32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_and_src2_b64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_append                      dst                            <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_bpermute_b32                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a>
+ds_cmpst_b32                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_b64                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_f32                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_f64                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_rtn_b32               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_rtn_b64               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_rtn_f32               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_cmpst_rtn_f64               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_condxchg32_rtn_b64          dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_consume                     dst                            <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_dec_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_barrier                 src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_init                    src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_sema_br                 src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_sema_p                                                 <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_sema_release_all                                       <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_gws_sema_v                                                 <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_inc_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_f32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_f64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_i32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_i64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_f32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_f64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_i32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_i64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_f32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_f64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_i32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_i64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_max_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_f32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_f64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_i32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_i64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_f32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_f64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_i32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_i64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_f32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_f64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_i32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_i64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_min_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_mskor_b32                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_mskor_b64                   src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_mskor_rtn_b32               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_mskor_rtn_b64               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_nop
+ds_or_b32                      src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_or_b64                      src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_or_rtn_b32                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_or_rtn_b64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_or_src2_b32                 src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_or_src2_b64                 src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_ordered_count               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_permute_b32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a>
+ds_read2_b32                   dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read2_b64                   dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read2st64_b32               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read2st64_b64               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_b128                   dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_b32                    dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_b64                    dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_b96                    dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_i16                    dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_i8                     dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_u16                    dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_read_u8                     dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_rtn_u32                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_rtn_u64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_src2_u32               src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_src2_u64               src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_u32                    src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_rsub_u64                    src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_rtn_u32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_rtn_u64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_src2_u32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_src2_u64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_u32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_sub_u64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_swizzle_b32                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-sw-offset16"><span class="std std-ref">sw_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrap_rtn_b32                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write2_b32                  src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write2_b64                  src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write2st64_b32              src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write2st64_b64              src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b128                  src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b16                   src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b32                   src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b64                   src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b8                    src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_b96                   src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_src2_b32              src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_write_src2_b64              src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg2_rtn_b32             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg2_rtn_b64             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg2st64_rtn_b32         dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg2st64_rtn_b64         dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset8"><span class="std std-ref">ds_offset8</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg_rtn_b32              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_wrxchg_rtn_b64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_b32                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_b64                     src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_rtn_b32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_rtn_b64                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_src2_b32                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+ds_xor_src2_b64                src0                           <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-ds-offset16"><span class="std std-ref">ds_offset16</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-gds"><span class="std std-ref">gds</span></a>
+</pre>
+</div>
+<div class="section" id="exp">
+<h2><a class="toc-backref" href="#id2">EXP</a><a class="headerlink" href="#exp" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+exp                            dst, src0, src1, src2, src3    <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-done"><span class="std std-ref">done</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-compr"><span class="std std-ref">compr</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-vm"><span class="std std-ref">vm</span></a>
+</pre>
+</div>
+<div class="section" id="flat">
+<h2><a class="toc-backref" href="#id3">FLAT</a><a class="headerlink" href="#flat" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+flat_atomic_add                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_add_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_and                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_and_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_cmpswap            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_cmpswap_x2         dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_dec                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_dec_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_inc                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_inc_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_or                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_or_x2              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_smax               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_smax_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_smin               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_smin_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_sub                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_sub_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_swap               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_swap_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_umax               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_umax_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_umin               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_umin_x2            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_xor                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_atomic_xor_x2             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_dword                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_dwordx2              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_dwordx3              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_dwordx4              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_sbyte                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_sshort               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_ubyte                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_load_ushort               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_byte                src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_dword               src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_dwordx2             src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_dwordx3             src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_dwordx4             src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+flat_store_short               src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+</pre>
+</div>
+<div class="section" id="mimg">
+<h2><a class="toc-backref" href="#id4">MIMG</a><a class="headerlink" href="#mimg" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+image_atomic_add               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_and               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_cmpswap           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_dec               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_inc               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_or                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_smax              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_smin              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_sub               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_swap              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_umax              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_umin              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_atomic_xor               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_gather4                  dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_b                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_b_cl             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_b_cl_o           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_b_o              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c_b              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c_b_cl           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c_b_cl_o         dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c_b_o            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c_cl             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c_cl_o           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c_l              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c_l_o            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c_lz             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c_lz_o           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_c_o              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_cl               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_cl_o             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_l                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_l_o              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_lz               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_lz_o             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_gather4_o                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_get_lod                  dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_get_resinfo              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_load                     dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_load_mip                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_load_mip_pck             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_load_mip_pck_sgn         dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_load_pck                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_load_pck_sgn             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_sample                   dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_sample_b                 dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_sample_b_cl              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_sample_c                 dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_sample_c_b               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_sample_c_b_cl            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_sample_c_cl              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_sample_c_l               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_sample_c_lz              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_sample_cl                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_sample_l                 dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_sample_lz                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-tfe"><span class="std std-ref">tfe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_store                    src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_store_mip                src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-d16"><span class="std std-ref">d16</span></a>
+image_store_mip_pck            src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+image_store_pck                src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dmask"><span class="std std-ref">dmask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-unorm"><span class="std std-ref">unorm</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lwe"><span class="std std-ref">lwe</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-da"><span class="std std-ref">da</span></a>
+</pre>
+</div>
+<div class="section" id="mubuf">
+<h2><a class="toc-backref" href="#id5">MUBUF</a><a class="headerlink" href="#mubuf" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+buffer_atomic_add              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_add_x2           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_and              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_and_x2           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_cmpswap          dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_cmpswap_x2       dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_dec              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_dec_x2           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_inc              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_inc_x2           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_or               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_or_x2            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_smax             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_smax_x2          dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_smin             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_smin_x2          dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_sub              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_sub_x2           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_swap             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_swap_x2          dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_umax             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_umax_x2          dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_umin             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_umin_x2          dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_xor              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_atomic_xor_x2           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_dword              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_load_dwordx2            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_dwordx3            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_dwordx4            dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_format_d16_x       dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_format_d16_xy      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_format_d16_xyz     dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_format_d16_xyzw    dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_format_x           dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_load_format_xy          dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_format_xyz         dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_format_xyzw        dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_load_sbyte              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_load_sshort             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_load_ubyte              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_load_ushort             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a>
+buffer_store_byte              src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_dword             src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_dwordx2           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_dwordx3           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_dwordx4           src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_d16_x      src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_d16_xy     src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_d16_xyz    src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_d16_xyzw   src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_x          src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_xy         src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_xyz        src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_format_xyzw       src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_lds_dword         src0, src1                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-lds"><span class="std std-ref">lds</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_store_short             src0, src1, src2, src3         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-idxen"><span class="std std-ref">idxen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-offen"><span class="std std-ref">offen</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-buf-offset12"><span class="std std-ref">buf_offset12</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-slc"><span class="std std-ref">slc</span></a>
+buffer_wbinvl1
+buffer_wbinvl1_vol
+</pre>
+</div>
+<div class="section" id="smem">
+<h2><a class="toc-backref" href="#id6">SMEM</a><a class="headerlink" href="#smem" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+s_atc_probe                    src0, src1, src2
+s_atc_probe_buffer             src0, src1, src2
+s_buffer_load_dword            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_buffer_load_dwordx16         dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_buffer_load_dwordx2          dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_buffer_load_dwordx4          dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_buffer_load_dwordx8          dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_buffer_store_dword           src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_buffer_store_dwordx2         src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_buffer_store_dwordx4         src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_dcache_inv
+s_dcache_inv_vol
+s_dcache_wb
+s_dcache_wb_vol
+s_load_dword                   dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_load_dwordx16                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_load_dwordx2                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_load_dwordx4                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_load_dwordx8                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_memrealtime                  dst
+s_memtime                      dst
+s_store_dword                  src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_store_dwordx2                src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+s_store_dwordx4                src0, src1, src2               <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-glc"><span class="std std-ref">glc</span></a>
+</pre>
+</div>
+<div class="section" id="sop1">
+<h2><a class="toc-backref" href="#id7">SOP1</a><a class="headerlink" href="#sop1" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">s_abs_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_and_saveexec_b64</span>             <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_andn2_saveexec_b64</span>           <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bcnt0_i32_b32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bcnt0_i32_b64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bcnt1_i32_b32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bcnt1_i32_b64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bitset0_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bitset0_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bitset1_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_bitset1_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_brev_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_brev_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_cbranch_join</span>                 <span class="n">src0</span>
+<span class="n">s_cmov_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_cmov_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_ff0_i32_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_ff0_i32_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_ff1_i32_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_ff1_i32_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_flbit_i32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_flbit_i32_b32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_flbit_i32_b64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_flbit_i32_i64</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_getpc_b64</span>                    <span class="n">dst</span>
+<span class="n">s_mov_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_mov_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_mov_fed_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_movreld_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_movreld_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_movrels_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_movrels_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_nand_saveexec_b64</span>            <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_nor_saveexec_b64</span>             <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_not_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_not_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_or_saveexec_b64</span>              <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_orn2_saveexec_b64</span>            <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_quadmask_b32</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_quadmask_b64</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_rfe_b64</span>                      <span class="n">src0</span>
+<span class="n">s_set_gpr_idx_idx</span>              <span class="n">src0</span>
+<span class="n">s_setpc_b64</span>                    <span class="n">src0</span>
+<span class="n">s_sext_i32_i16</span>                 <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_sext_i32_i8</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_swappc_b64</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_wqm_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_wqm_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_xnor_saveexec_b64</span>            <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_xor_saveexec_b64</span>             <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="sop2">
+<h2><a class="toc-backref" href="#id8">SOP2</a><a class="headerlink" href="#sop2" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">s_absdiff_i32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_add_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_add_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_addc_u32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_and_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_and_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_andn2_b32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_andn2_b64</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_ashr_i32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_ashr_i64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfe_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfe_i64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfe_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfe_u64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfm_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bfm_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cbranch_g_fork</span>               <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cselect_b32</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cselect_b64</span>                  <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_lshl_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_lshl_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_lshr_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_lshr_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_max_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_max_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_min_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_min_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_mul_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_nand_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_nand_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_nor_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_nor_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_or_b32</span>                       <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_or_b64</span>                       <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_orn2_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_orn2_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_rfe_restore_b64</span>              <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_sub_i32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_sub_u32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_subb_u32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_xnor_b32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_xnor_b64</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_xor_b32</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_xor_b64</span>                      <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="sopc">
+<h2><a class="toc-backref" href="#id9">SOPC</a><a class="headerlink" href="#sopc" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">s_bitcmp0_b32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bitcmp0_b64</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bitcmp1_b32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_bitcmp1_b64</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_eq_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_eq_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_eq_u64</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_ge_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_ge_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_gt_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_gt_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_le_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_le_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_lg_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_lg_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_lg_u64</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_lt_i32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmp_lt_u32</span>                   <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_set_gpr_idx_on</span>               <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_setvskip</span>                     <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="sopk">
+<h2><a class="toc-backref" href="#id10">SOPK</a><a class="headerlink" href="#sopk" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">s_addk_i32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_cbranch_i_fork</span>               <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmovk_i32</span>                    <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_cmpk_eq_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_eq_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_ge_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_ge_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_gt_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_gt_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_le_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_le_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_lg_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_lg_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_lt_i32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_cmpk_lt_u32</span>                  <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">s_getreg_b32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_movk_i32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_mulk_i32</span>                     <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_setreg_b32</span>                   <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+<span class="n">s_setreg_imm32_b32</span>             <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="sopp">
+<h2><a class="toc-backref" href="#id11">SOPP</a><a class="headerlink" href="#sopp" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">s_barrier</span>
+<span class="n">s_branch</span>                       <span class="n">src0</span>
+<span class="n">s_cbranch_cdbgsys</span>              <span class="n">src0</span>
+<span class="n">s_cbranch_cdbgsys_and_user</span>     <span class="n">src0</span>
+<span class="n">s_cbranch_cdbgsys_or_user</span>      <span class="n">src0</span>
+<span class="n">s_cbranch_cdbguser</span>             <span class="n">src0</span>
+<span class="n">s_cbranch_execnz</span>               <span class="n">src0</span>
+<span class="n">s_cbranch_execz</span>                <span class="n">src0</span>
+<span class="n">s_cbranch_scc0</span>                 <span class="n">src0</span>
+<span class="n">s_cbranch_scc1</span>                 <span class="n">src0</span>
+<span class="n">s_cbranch_vccnz</span>                <span class="n">src0</span>
+<span class="n">s_cbranch_vccz</span>                 <span class="n">src0</span>
+<span class="n">s_decperflevel</span>                 <span class="n">src0</span>
+<span class="n">s_endpgm</span>
+<span class="n">s_endpgm_saved</span>
+<span class="n">s_icache_inv</span>
+<span class="n">s_incperflevel</span>                 <span class="n">src0</span>
+<span class="n">s_nop</span>                          <span class="n">src0</span>
+<span class="n">s_sendmsg</span>                      <span class="n">src0</span>
+<span class="n">s_sendmsghalt</span>                  <span class="n">src0</span>
+<span class="n">s_set_gpr_idx_mode</span>             <span class="n">src0</span>
+<span class="n">s_set_gpr_idx_off</span>
+<span class="n">s_sethalt</span>                      <span class="n">src0</span>
+<span class="n">s_setkill</span>                      <span class="n">src0</span>
+<span class="n">s_setprio</span>                      <span class="n">src0</span>
+<span class="n">s_sleep</span>                        <span class="n">src0</span>
+<span class="n">s_trap</span>                         <span class="n">src0</span>
+<span class="n">s_ttracedata</span>
+<span class="n">s_waitcnt</span>                      <span class="n">src0</span>
+<span class="n">s_wakeup</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="vintrp">
+<h2><a class="toc-backref" href="#id12">VINTRP</a><a class="headerlink" href="#vintrp" title="Permalink to this headline">¶</a></h2>
+<div class="highlight-default"><div class="highlight"><pre><span></span><span class="n">v_interp_mov_f32</span>               <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_interp_p1_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+<span class="n">v_interp_p2_f32</span>                <span class="n">dst</span><span class="p">,</span> <span class="n">src0</span><span class="p">,</span> <span class="n">src1</span>
+</pre></div>
+</div>
+</div>
+<div class="section" id="vop1">
+<h2><a class="toc-backref" href="#id13">VOP1</a><a class="headerlink" href="#vop1" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+v_bfrev_b32                    dst, src0
+v_bfrev_b32_dpp                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_bfrev_b32_sdwa               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_ceil_f16                     dst, src0
+v_ceil_f16_dpp                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_ceil_f16_sdwa                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_ceil_f32                     dst, src0
+v_ceil_f32_dpp                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_ceil_f32_sdwa                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_ceil_f64                     dst, src0
+v_clrexcp
+v_cos_f16                      dst, src0
+v_cos_f16_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cos_f16_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cos_f32                      dst, src0
+v_cos_f32_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cos_f32_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_f16_f32                  dst, src0
+v_cvt_f16_f32_dpp              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_f16_f32_sdwa             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_f16_i16                  dst, src0
+v_cvt_f16_i16_dpp              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_f16_i16_sdwa             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_f16_u16                  dst, src0
+v_cvt_f16_u16_dpp              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_f16_u16_sdwa             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_f32_f16                  dst, src0
+v_cvt_f32_f16_dpp              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_f32_f16_sdwa             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_f32_f64                  dst, src0
+v_cvt_f32_i32                  dst, src0
+v_cvt_f32_i32_dpp              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_f32_i32_sdwa             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_f32_u32                  dst, src0
+v_cvt_f32_u32_dpp              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_f32_u32_sdwa             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_f32_ubyte0               dst, src0
+v_cvt_f32_ubyte0_dpp           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_f32_ubyte0_sdwa          dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_f32_ubyte1               dst, src0
+v_cvt_f32_ubyte1_dpp           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_f32_ubyte1_sdwa          dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_f32_ubyte2               dst, src0
+v_cvt_f32_ubyte2_dpp           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_f32_ubyte2_sdwa          dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_f32_ubyte3               dst, src0
+v_cvt_f32_ubyte3_dpp           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_f32_ubyte3_sdwa          dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_f64_f32                  dst, src0
+v_cvt_f64_i32                  dst, src0
+v_cvt_f64_u32                  dst, src0
+v_cvt_flr_i32_f32              dst, src0
+v_cvt_flr_i32_f32_dpp          dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_flr_i32_f32_sdwa         dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_i16_f16                  dst, src0
+v_cvt_i16_f16_dpp              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_i16_f16_sdwa             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_i32_f32                  dst, src0
+v_cvt_i32_f32_dpp              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_i32_f32_sdwa             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_i32_f64                  dst, src0
+v_cvt_off_f32_i4               dst, src0
+v_cvt_off_f32_i4_dpp           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_off_f32_i4_sdwa          dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_rpi_i32_f32              dst, src0
+v_cvt_rpi_i32_f32_dpp          dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_rpi_i32_f32_sdwa         dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_u16_f16                  dst, src0
+v_cvt_u16_f16_dpp              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_u16_f16_sdwa             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_u32_f32                  dst, src0
+v_cvt_u32_f32_dpp              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cvt_u32_f32_sdwa             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_cvt_u32_f64                  dst, src0
+v_exp_f16                      dst, src0
+v_exp_f16_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_exp_f16_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_exp_f32                      dst, src0
+v_exp_f32_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_exp_f32_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_exp_legacy_f32               dst, src0
+v_exp_legacy_f32_dpp           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_exp_legacy_f32_sdwa          dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_ffbh_i32                     dst, src0
+v_ffbh_i32_dpp                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_ffbh_i32_sdwa                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_ffbh_u32                     dst, src0
+v_ffbh_u32_dpp                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_ffbh_u32_sdwa                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_ffbl_b32                     dst, src0
+v_ffbl_b32_dpp                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_ffbl_b32_sdwa                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_floor_f16                    dst, src0
+v_floor_f16_dpp                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_floor_f16_sdwa               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_floor_f32                    dst, src0
+v_floor_f32_dpp                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_floor_f32_sdwa               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_floor_f64                    dst, src0
+v_fract_f16                    dst, src0
+v_fract_f16_dpp                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_fract_f16_sdwa               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_fract_f32                    dst, src0
+v_fract_f32_dpp                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_fract_f32_sdwa               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_fract_f64                    dst, src0
+v_frexp_exp_i16_f16            dst, src0
+v_frexp_exp_i16_f16_dpp        dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_frexp_exp_i16_f16_sdwa       dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_frexp_exp_i32_f32            dst, src0
+v_frexp_exp_i32_f32_dpp        dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_frexp_exp_i32_f32_sdwa       dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_frexp_exp_i32_f64            dst, src0
+v_frexp_mant_f16               dst, src0
+v_frexp_mant_f16_dpp           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_frexp_mant_f16_sdwa          dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_frexp_mant_f32               dst, src0
+v_frexp_mant_f32_dpp           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_frexp_mant_f32_sdwa          dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_frexp_mant_f64               dst, src0
+v_log_f16                      dst, src0
+v_log_f16_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_log_f16_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_log_f32                      dst, src0
+v_log_f32_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_log_f32_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_log_legacy_f32               dst, src0
+v_log_legacy_f32_dpp           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_log_legacy_f32_sdwa          dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_mov_b32                      dst, src0
+v_mov_b32_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mov_b32_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_mov_fed_b32                  dst, src0
+v_mov_fed_b32_dpp              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mov_fed_b32_sdwa             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_movreld_b32                  dst, src0
+v_movrels_b32                  dst, src0
+v_movrelsd_b32                 dst, src0
+v_nop
+v_not_b32                      dst, src0
+v_not_b32_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_not_b32_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_rcp_f16                      dst, src0
+v_rcp_f16_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_rcp_f16_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_rcp_f32                      dst, src0
+v_rcp_f32_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_rcp_f32_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_rcp_f64                      dst, src0
+v_rcp_iflag_f32                dst, src0
+v_rcp_iflag_f32_dpp            dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_rcp_iflag_f32_sdwa           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_readfirstlane_b32            dst, src0
+v_rndne_f16                    dst, src0
+v_rndne_f16_dpp                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_rndne_f16_sdwa               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_rndne_f32                    dst, src0
+v_rndne_f32_dpp                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_rndne_f32_sdwa               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_rndne_f64                    dst, src0
+v_rsq_f16                      dst, src0
+v_rsq_f16_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_rsq_f16_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_rsq_f32                      dst, src0
+v_rsq_f32_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_rsq_f32_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_rsq_f64                      dst, src0
+v_sin_f16                      dst, src0
+v_sin_f16_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_sin_f16_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_sin_f32                      dst, src0
+v_sin_f32_dpp                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_sin_f32_sdwa                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_sqrt_f16                     dst, src0
+v_sqrt_f16_dpp                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_sqrt_f16_sdwa                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_sqrt_f32                     dst, src0
+v_sqrt_f32_dpp                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_sqrt_f32_sdwa                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_sqrt_f64                     dst, src0
+v_trunc_f16                    dst, src0
+v_trunc_f16_dpp                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_trunc_f16_sdwa               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_trunc_f32                    dst, src0
+v_trunc_f32_dpp                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_trunc_f32_sdwa               dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a>
+v_trunc_f64                    dst, src0
+</pre>
+</div>
+<div class="section" id="vop2">
+<h2><a class="toc-backref" href="#id14">VOP2</a><a class="headerlink" href="#vop2" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+v_add_f16                      dst, src0, src1
+v_add_f16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_add_f16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_add_f32                      dst, src0, src1
+v_add_f32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_add_f32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_add_u16                      dst, src0, src1
+v_add_u16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_add_u16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_add_u32                      dst0, dst1, src0, src1
+v_add_u32_dpp                  dst0, dst1, src0, src1         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_add_u32_sdwa                 dst0, dst1, src0, src1         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_addc_u32                     dst0, dst1, src0, src1, src2
+v_addc_u32_dpp                 dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_addc_u32_sdwa                dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_and_b32                      dst, src0, src1
+v_and_b32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_and_b32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_ashrrev_i16                  dst, src0, src1
+v_ashrrev_i16_dpp              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_ashrrev_i16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_ashrrev_i32                  dst, src0, src1
+v_ashrrev_i32_dpp              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_ashrrev_i32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cndmask_b32                  dst, src0, src1, src2
+v_cndmask_b32_dpp              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_cndmask_b32_sdwa             dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_ldexp_f16                    dst, src0, src1
+v_ldexp_f16_dpp                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_ldexp_f16_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_lshlrev_b16                  dst, src0, src1
+v_lshlrev_b16_dpp              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_lshlrev_b16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_lshlrev_b32                  dst, src0, src1
+v_lshlrev_b32_dpp              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_lshlrev_b32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_lshrrev_b16                  dst, src0, src1
+v_lshrrev_b16_dpp              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_lshrrev_b16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_lshrrev_b32                  dst, src0, src1
+v_lshrrev_b32_dpp              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_lshrrev_b32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_mac_f16                      dst, src0, src1
+v_mac_f16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mac_f16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_mac_f32                      dst, src0, src1
+v_mac_f32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mac_f32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_madak_f16                    dst, src0, src1, src2
+v_madak_f32                    dst, src0, src1, src2
+v_madmk_f16                    dst, src0, src1, src2
+v_madmk_f32                    dst, src0, src1, src2
+v_max_f16                      dst, src0, src1
+v_max_f16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_max_f16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_max_f32                      dst, src0, src1
+v_max_f32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_max_f32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_max_i16                      dst, src0, src1
+v_max_i16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_max_i16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_max_i32                      dst, src0, src1
+v_max_i32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_max_i32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_max_u16                      dst, src0, src1
+v_max_u16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_max_u16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_max_u32                      dst, src0, src1
+v_max_u32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_max_u32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_min_f16                      dst, src0, src1
+v_min_f16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_min_f16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_min_f32                      dst, src0, src1
+v_min_f32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_min_f32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_min_i16                      dst, src0, src1
+v_min_i16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_min_i16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_min_i32                      dst, src0, src1
+v_min_i32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_min_i32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_min_u16                      dst, src0, src1
+v_min_u16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_min_u16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_min_u32                      dst, src0, src1
+v_min_u32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_min_u32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_mul_f16                      dst, src0, src1
+v_mul_f16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mul_f16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_mul_f32                      dst, src0, src1
+v_mul_f32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mul_f32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_mul_hi_i32_i24               dst, src0, src1
+v_mul_hi_i32_i24_dpp           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mul_hi_i32_i24_sdwa          dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_mul_hi_u32_u24               dst, src0, src1
+v_mul_hi_u32_u24_dpp           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mul_hi_u32_u24_sdwa          dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_mul_i32_i24                  dst, src0, src1
+v_mul_i32_i24_dpp              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mul_i32_i24_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_mul_legacy_f32               dst, src0, src1
+v_mul_legacy_f32_dpp           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mul_legacy_f32_sdwa          dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_mul_lo_u16                   dst, src0, src1
+v_mul_lo_u16_dpp               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mul_lo_u16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_mul_u32_u24                  dst, src0, src1
+v_mul_u32_u24_dpp              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_mul_u32_u24_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_or_b32                       dst, src0, src1
+v_or_b32_dpp                   dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_or_b32_sdwa                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_sub_f16                      dst, src0, src1
+v_sub_f16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_sub_f16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_sub_f32                      dst, src0, src1
+v_sub_f32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_sub_f32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_sub_u16                      dst, src0, src1
+v_sub_u16_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_sub_u16_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_sub_u32                      dst0, dst1, src0, src1
+v_sub_u32_dpp                  dst0, dst1, src0, src1         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_sub_u32_sdwa                 dst0, dst1, src0, src1         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_subb_u32                     dst0, dst1, src0, src1, src2
+v_subb_u32_dpp                 dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_subb_u32_sdwa                dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_subbrev_u32                  dst0, dst1, src0, src1, src2
+v_subbrev_u32_dpp              dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_subbrev_u32_sdwa             dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_subrev_f16                   dst, src0, src1
+v_subrev_f16_dpp               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_subrev_f16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_subrev_f32                   dst, src0, src1
+v_subrev_f32_dpp               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_subrev_f32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_subrev_u16                   dst, src0, src1
+v_subrev_u16_dpp               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_subrev_u16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_subrev_u32                   dst0, dst1, src0, src1
+v_subrev_u32_dpp               dst0, dst1, src0, src1         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_subrev_u32_sdwa              dst0, dst1, src0, src1         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_xor_b32                      dst, src0, src1
+v_xor_b32_dpp                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dpp-ctrl"><span class="std std-ref">dpp_ctrl</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-row-mask"><span class="std std-ref">row_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bank-mask"><span class="std std-ref">bank_mask</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-bound-ctrl"><span class="std std-ref">bound_ctrl</span></a>
+v_xor_b32_sdwa                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-sel"><span class="std std-ref">dst_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-dst-unused"><span class="std std-ref">dst_unused</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+</pre>
+</div>
+<div class="section" id="vop3">
+<h2><a class="toc-backref" href="#id15">VOP3</a><a class="headerlink" href="#vop3" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+v_add_f16_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_add_f32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_add_f64                      dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_add_u16_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_add_u32_e64                  dst0, dst1, src0, src1         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_addc_u32_e64                 dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_alignbit_b32                 dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_alignbyte_b32                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_and_b32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ashrrev_i16_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ashrrev_i32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ashrrev_i64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bcnt_u32_b32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bfe_i32                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bfe_u32                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bfi_b32                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bfm_b32                      dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_bfrev_b32_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ceil_f16_e64                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ceil_f32_e64                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ceil_f64_e64                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_clrexcp_e64                                                 <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_class_f16_e64            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_class_f32_e64            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_class_f64_e64            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_f16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_f32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_f64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_i16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_i32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_u16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_u32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_eq_u64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_f_f16_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_f_f32_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_f_f64_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_f_i16_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_f_i32_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_f_i64_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_f_u16_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_f_u32_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_f_u64_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ge_f16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ge_f32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ge_f64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ge_i16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ge_i32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ge_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ge_u16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ge_u32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ge_u64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_gt_f16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_gt_f32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_gt_f64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_gt_i16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_gt_i32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_gt_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_gt_u16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_gt_u32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_gt_u64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_le_f16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_le_f32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_le_f64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_le_i16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_le_i32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_le_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_le_u16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_le_u32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_le_u64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lg_f16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lg_f32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lg_f64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lt_f16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lt_f32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lt_f64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lt_i16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lt_i32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lt_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lt_u16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lt_u32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_lt_u64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ne_i16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ne_i32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ne_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ne_u16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ne_u32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ne_u64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_neq_f16_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_neq_f32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_neq_f64_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nge_f16_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nge_f32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nge_f64_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ngt_f16_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ngt_f32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_ngt_f64_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nle_f16_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nle_f32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nle_f64_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nlg_f16_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nlg_f32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nlg_f64_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nlt_f16_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nlt_f32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_nlt_f64_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_o_f16_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_o_f32_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_o_f64_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_t_i16_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_t_i32_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_t_i64_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_t_u16_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_t_u32_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_t_u64_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_tru_f16_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_tru_f32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_tru_f64_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_u_f16_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_u_f32_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmp_u_f64_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmpx_class_f32_e64           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmpx_class_f64_e64           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmpx_eq_f16_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmpx_eq_f32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmpx_eq_f64_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmpx_eq_i32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmpx_eq_i64_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmpx_eq_u64_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmpx_f_f32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cmpx_f_i32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_cmpx_f_i64_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_cvt_u32_f64_e64              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_div_fixup_f16                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_div_fixup_f32                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_div_fixup_f64                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_div_fmas_f32                 dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_div_fmas_f64                 dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_div_scale_f32                dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_div_scale_f64                dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_exp_f16_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_exp_f32_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_exp_legacy_f32_e64           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ffbh_i32_e64                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ffbh_u32_e64                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ffbl_b32_e64                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_floor_f16_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_floor_f32_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_floor_f64_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_fma_f16                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_fma_f32                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_fma_f64                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_fract_f16_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_fract_f32_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_fract_f64_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_frexp_exp_i16_f16_e64        dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_frexp_exp_i32_f32_e64        dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_frexp_exp_i32_f64_e64        dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_frexp_mant_f16_e64           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_frexp_mant_f32_e64           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_frexp_mant_f64_e64           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_interp_mov_f32_e64           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_interp_p1_f32_e64            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_interp_p1ll_f16              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-high"><span class="std std-ref">high</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_interp_p1lv_f16              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-high"><span class="std std-ref">high</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_interp_p2_f16                dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-high"><span class="std std-ref">high</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_interp_p2_f32_e64            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ldexp_f16_e64                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ldexp_f32                    dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_ldexp_f64                    dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_lerp_u8                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_log_f16_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_log_f32_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_log_legacy_f32_e64           dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_lshlrev_b16_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_lshlrev_b32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_lshlrev_b64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_lshrrev_b16_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_lshrrev_b32_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_lshrrev_b64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mac_f16_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mac_f32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mad_f16                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mad_f32                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mad_i16                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mad_i32_i24                  dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mad_i64_i32                  dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mad_legacy_f32               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mad_u16                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mad_u32_u24                  dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mad_u64_u32                  dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_max3_f32                     dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_max3_i32                     dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_max3_u32                     dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_max_f16_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_max_f32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_max_f64                      dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_max_i16_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_max_i32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_max_u16_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_max_u32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mbcnt_hi_u32_b32             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mbcnt_lo_u32_b32             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_med3_f32                     dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_med3_i32                     dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_med3_u32                     dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_min3_f32                     dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_min3_i32                     dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_min3_u32                     dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_min_f16_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_min_f32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_min_f64                      dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_min_i16_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_min_i32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
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+v_mov_b32_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mov_fed_b32_e64              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_movreld_b32_e64              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_movrels_b32_e64              dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_movrelsd_b32_e64             dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mqsad_pk_u16_u8              dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mqsad_u32_u8                 dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_msad_u8                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_f16_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_f32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_f64                      dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_hi_i32                   dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_hi_i32_i24_e64           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_hi_u32                   dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_hi_u32_u24_e64           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_i32_i24_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_legacy_f32_e64           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_lo_u16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_lo_u32                   dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_mul_u32_u24_e64              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_nop_e64                                                     <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_not_b32_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_or_b32_e64                   dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_perm_b32                     dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_qsad_pk_u16_u8               dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_rcp_f16_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_rcp_f32_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_rcp_f64_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_rcp_iflag_f32_e64            dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_readlane_b32                 dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_rndne_f16_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_rndne_f32_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_rndne_f64_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_rsq_f16_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_rsq_f32_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_rsq_f64_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sad_hi_u8                    dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sad_u16                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sad_u32                      dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sad_u8                       dst, src0, src1, src2          <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sin_f16_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sin_f32_e64                  dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sqrt_f16_e64                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sqrt_f32_e64                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sqrt_f64_e64                 dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sub_f16_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sub_f32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sub_u16_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_sub_u32_e64                  dst0, dst1, src0, src1         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_subb_u32_e64                 dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_subbrev_u32_e64              dst0, dst1, src0, src1, src2   <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_subrev_f16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_subrev_f32_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_subrev_u16_e64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_subrev_u32_e64               dst0, dst1, src0, src1         <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_trig_preop_f64               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_trunc_f16_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_trunc_f32_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_trunc_f64_e64                dst, src0                      <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_writelane_b32                dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+v_xor_b32_e64                  dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-omod"><span class="std std-ref">omod</span></a>
+</pre>
+</div>
+<div class="section" id="vopc">
+<h2><a class="toc-backref" href="#id16">VOPC</a><a class="headerlink" href="#vopc" title="Permalink to this headline">¶</a></h2>
+<pre class="literal-block">
+v_cmp_class_f16                dst, src0, src1
+v_cmp_class_f16_sdwa           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_class_f32                dst, src0, src1
+v_cmp_class_f32_sdwa           dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_class_f64                dst, src0, src1
+v_cmp_eq_f16                   dst, src0, src1
+v_cmp_eq_f16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_eq_f32                   dst, src0, src1
+v_cmp_eq_f32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_eq_f64                   dst, src0, src1
+v_cmp_eq_i16                   dst, src0, src1
+v_cmp_eq_i16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_eq_i32                   dst, src0, src1
+v_cmp_eq_i32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_eq_i64                   dst, src0, src1
+v_cmp_eq_u16                   dst, src0, src1
+v_cmp_eq_u16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_eq_u32                   dst, src0, src1
+v_cmp_eq_u32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_eq_u64                   dst, src0, src1
+v_cmp_f_f16                    dst, src0, src1
+v_cmp_f_f16_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_f_f32                    dst, src0, src1
+v_cmp_f_f32_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_f_f64                    dst, src0, src1
+v_cmp_f_i16                    dst, src0, src1
+v_cmp_f_i16_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_f_i32                    dst, src0, src1
+v_cmp_f_i32_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_f_i64                    dst, src0, src1
+v_cmp_f_u16                    dst, src0, src1
+v_cmp_f_u16_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_f_u32                    dst, src0, src1
+v_cmp_f_u32_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_f_u64                    dst, src0, src1
+v_cmp_ge_f16                   dst, src0, src1
+v_cmp_ge_f16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ge_f32                   dst, src0, src1
+v_cmp_ge_f32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ge_f64                   dst, src0, src1
+v_cmp_ge_i16                   dst, src0, src1
+v_cmp_ge_i16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ge_i32                   dst, src0, src1
+v_cmp_ge_i32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ge_i64                   dst, src0, src1
+v_cmp_ge_u16                   dst, src0, src1
+v_cmp_ge_u16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ge_u32                   dst, src0, src1
+v_cmp_ge_u32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ge_u64                   dst, src0, src1
+v_cmp_gt_f16                   dst, src0, src1
+v_cmp_gt_f16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_gt_f32                   dst, src0, src1
+v_cmp_gt_f32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_gt_f64                   dst, src0, src1
+v_cmp_gt_i16                   dst, src0, src1
+v_cmp_gt_i16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_gt_i32                   dst, src0, src1
+v_cmp_gt_i32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_gt_i64                   dst, src0, src1
+v_cmp_gt_u16                   dst, src0, src1
+v_cmp_gt_u16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_gt_u32                   dst, src0, src1
+v_cmp_gt_u32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_gt_u64                   dst, src0, src1
+v_cmp_le_f16                   dst, src0, src1
+v_cmp_le_f16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_le_f32                   dst, src0, src1
+v_cmp_le_f32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_le_f64                   dst, src0, src1
+v_cmp_le_i16                   dst, src0, src1
+v_cmp_le_i16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_le_i32                   dst, src0, src1
+v_cmp_le_i32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_le_i64                   dst, src0, src1
+v_cmp_le_u16                   dst, src0, src1
+v_cmp_le_u16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_le_u32                   dst, src0, src1
+v_cmp_le_u32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_le_u64                   dst, src0, src1
+v_cmp_lg_f16                   dst, src0, src1
+v_cmp_lg_f16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_lg_f32                   dst, src0, src1
+v_cmp_lg_f32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_lg_f64                   dst, src0, src1
+v_cmp_lt_f16                   dst, src0, src1
+v_cmp_lt_f16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_lt_f32                   dst, src0, src1
+v_cmp_lt_f32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_lt_f64                   dst, src0, src1
+v_cmp_lt_i16                   dst, src0, src1
+v_cmp_lt_i16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_lt_i32                   dst, src0, src1
+v_cmp_lt_i32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_lt_i64                   dst, src0, src1
+v_cmp_lt_u16                   dst, src0, src1
+v_cmp_lt_u16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_lt_u32                   dst, src0, src1
+v_cmp_lt_u32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_lt_u64                   dst, src0, src1
+v_cmp_ne_i16                   dst, src0, src1
+v_cmp_ne_i16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ne_i32                   dst, src0, src1
+v_cmp_ne_i32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ne_i64                   dst, src0, src1
+v_cmp_ne_u16                   dst, src0, src1
+v_cmp_ne_u16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ne_u32                   dst, src0, src1
+v_cmp_ne_u32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ne_u64                   dst, src0, src1
+v_cmp_neq_f16                  dst, src0, src1
+v_cmp_neq_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_neq_f32                  dst, src0, src1
+v_cmp_neq_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_neq_f64                  dst, src0, src1
+v_cmp_nge_f16                  dst, src0, src1
+v_cmp_nge_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_nge_f32                  dst, src0, src1
+v_cmp_nge_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_nge_f64                  dst, src0, src1
+v_cmp_ngt_f16                  dst, src0, src1
+v_cmp_ngt_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ngt_f32                  dst, src0, src1
+v_cmp_ngt_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_ngt_f64                  dst, src0, src1
+v_cmp_nle_f16                  dst, src0, src1
+v_cmp_nle_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_nle_f32                  dst, src0, src1
+v_cmp_nle_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_nle_f64                  dst, src0, src1
+v_cmp_nlg_f16                  dst, src0, src1
+v_cmp_nlg_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_nlg_f32                  dst, src0, src1
+v_cmp_nlg_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_nlg_f64                  dst, src0, src1
+v_cmp_nlt_f16                  dst, src0, src1
+v_cmp_nlt_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_nlt_f32                  dst, src0, src1
+v_cmp_nlt_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_nlt_f64                  dst, src0, src1
+v_cmp_o_f16                    dst, src0, src1
+v_cmp_o_f16_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_o_f32                    dst, src0, src1
+v_cmp_o_f32_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_o_f64                    dst, src0, src1
+v_cmp_t_i16                    dst, src0, src1
+v_cmp_t_i16_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_t_i32                    dst, src0, src1
+v_cmp_t_i32_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_t_i64                    dst, src0, src1
+v_cmp_t_u16                    dst, src0, src1
+v_cmp_t_u16_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_t_u32                    dst, src0, src1
+v_cmp_t_u32_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_t_u64                    dst, src0, src1
+v_cmp_tru_f16                  dst, src0, src1
+v_cmp_tru_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_tru_f32                  dst, src0, src1
+v_cmp_tru_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_tru_f64                  dst, src0, src1
+v_cmp_u_f16                    dst, src0, src1
+v_cmp_u_f16_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_u_f32                    dst, src0, src1
+v_cmp_u_f32_sdwa               dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmp_u_f64                    dst, src0, src1
+v_cmpx_class_f16               dst, src0, src1
+v_cmpx_class_f16_sdwa          dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_class_f32               dst, src0, src1
+v_cmpx_class_f32_sdwa          dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_class_f64               dst, src0, src1
+v_cmpx_eq_f16                  dst, src0, src1
+v_cmpx_eq_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_eq_f32                  dst, src0, src1
+v_cmpx_eq_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_eq_f64                  dst, src0, src1
+v_cmpx_eq_i16                  dst, src0, src1
+v_cmpx_eq_i16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_eq_i32                  dst, src0, src1
+v_cmpx_eq_i32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_eq_i64                  dst, src0, src1
+v_cmpx_eq_u16                  dst, src0, src1
+v_cmpx_eq_u16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_eq_u32                  dst, src0, src1
+v_cmpx_eq_u32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_eq_u64                  dst, src0, src1
+v_cmpx_f_f16                   dst, src0, src1
+v_cmpx_f_f16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_f_f32                   dst, src0, src1
+v_cmpx_f_f32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_f_f64                   dst, src0, src1
+v_cmpx_f_i16                   dst, src0, src1
+v_cmpx_f_i16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_f_i32                   dst, src0, src1
+v_cmpx_f_i32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_f_i64                   dst, src0, src1
+v_cmpx_f_u16                   dst, src0, src1
+v_cmpx_f_u16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_f_u32                   dst, src0, src1
+v_cmpx_f_u32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_f_u64                   dst, src0, src1
+v_cmpx_ge_f16                  dst, src0, src1
+v_cmpx_ge_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ge_f32                  dst, src0, src1
+v_cmpx_ge_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ge_f64                  dst, src0, src1
+v_cmpx_ge_i16                  dst, src0, src1
+v_cmpx_ge_i16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ge_i32                  dst, src0, src1
+v_cmpx_ge_i32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ge_i64                  dst, src0, src1
+v_cmpx_ge_u16                  dst, src0, src1
+v_cmpx_ge_u16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ge_u32                  dst, src0, src1
+v_cmpx_ge_u32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ge_u64                  dst, src0, src1
+v_cmpx_gt_f16                  dst, src0, src1
+v_cmpx_gt_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_gt_f32                  dst, src0, src1
+v_cmpx_gt_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_gt_f64                  dst, src0, src1
+v_cmpx_gt_i16                  dst, src0, src1
+v_cmpx_gt_i16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_gt_i32                  dst, src0, src1
+v_cmpx_gt_i32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_gt_i64                  dst, src0, src1
+v_cmpx_gt_u16                  dst, src0, src1
+v_cmpx_gt_u16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_gt_u32                  dst, src0, src1
+v_cmpx_gt_u32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_gt_u64                  dst, src0, src1
+v_cmpx_le_f16                  dst, src0, src1
+v_cmpx_le_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_le_f32                  dst, src0, src1
+v_cmpx_le_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_le_f64                  dst, src0, src1
+v_cmpx_le_i16                  dst, src0, src1
+v_cmpx_le_i16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_le_i32                  dst, src0, src1
+v_cmpx_le_i32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_le_i64                  dst, src0, src1
+v_cmpx_le_u16                  dst, src0, src1
+v_cmpx_le_u16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_le_u32                  dst, src0, src1
+v_cmpx_le_u32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_le_u64                  dst, src0, src1
+v_cmpx_lg_f16                  dst, src0, src1
+v_cmpx_lg_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_lg_f32                  dst, src0, src1
+v_cmpx_lg_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_lg_f64                  dst, src0, src1
+v_cmpx_lt_f16                  dst, src0, src1
+v_cmpx_lt_f16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_lt_f32                  dst, src0, src1
+v_cmpx_lt_f32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_lt_f64                  dst, src0, src1
+v_cmpx_lt_i16                  dst, src0, src1
+v_cmpx_lt_i16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_lt_i32                  dst, src0, src1
+v_cmpx_lt_i32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_lt_i64                  dst, src0, src1
+v_cmpx_lt_u16                  dst, src0, src1
+v_cmpx_lt_u16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_lt_u32                  dst, src0, src1
+v_cmpx_lt_u32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_lt_u64                  dst, src0, src1
+v_cmpx_ne_i16                  dst, src0, src1
+v_cmpx_ne_i16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ne_i32                  dst, src0, src1
+v_cmpx_ne_i32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ne_i64                  dst, src0, src1
+v_cmpx_ne_u16                  dst, src0, src1
+v_cmpx_ne_u16_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ne_u32                  dst, src0, src1
+v_cmpx_ne_u32_sdwa             dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ne_u64                  dst, src0, src1
+v_cmpx_neq_f16                 dst, src0, src1
+v_cmpx_neq_f16_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_neq_f32                 dst, src0, src1
+v_cmpx_neq_f32_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_neq_f64                 dst, src0, src1
+v_cmpx_nge_f16                 dst, src0, src1
+v_cmpx_nge_f16_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_nge_f32                 dst, src0, src1
+v_cmpx_nge_f32_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_nge_f64                 dst, src0, src1
+v_cmpx_ngt_f16                 dst, src0, src1
+v_cmpx_ngt_f16_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ngt_f32                 dst, src0, src1
+v_cmpx_ngt_f32_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_ngt_f64                 dst, src0, src1
+v_cmpx_nle_f16                 dst, src0, src1
+v_cmpx_nle_f16_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_nle_f32                 dst, src0, src1
+v_cmpx_nle_f32_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_nle_f64                 dst, src0, src1
+v_cmpx_nlg_f16                 dst, src0, src1
+v_cmpx_nlg_f16_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_nlg_f32                 dst, src0, src1
+v_cmpx_nlg_f32_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_nlg_f64                 dst, src0, src1
+v_cmpx_nlt_f16                 dst, src0, src1
+v_cmpx_nlt_f16_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_nlt_f32                 dst, src0, src1
+v_cmpx_nlt_f32_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_nlt_f64                 dst, src0, src1
+v_cmpx_o_f16                   dst, src0, src1
+v_cmpx_o_f16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_o_f32                   dst, src0, src1
+v_cmpx_o_f32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_o_f64                   dst, src0, src1
+v_cmpx_t_i16                   dst, src0, src1
+v_cmpx_t_i16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_t_i32                   dst, src0, src1
+v_cmpx_t_i32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_t_i64                   dst, src0, src1
+v_cmpx_t_u16                   dst, src0, src1
+v_cmpx_t_u16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_t_u32                   dst, src0, src1
+v_cmpx_t_u32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_t_u64                   dst, src0, src1
+v_cmpx_tru_f16                 dst, src0, src1
+v_cmpx_tru_f16_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_tru_f32                 dst, src0, src1
+v_cmpx_tru_f32_sdwa            dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_tru_f64                 dst, src0, src1
+v_cmpx_u_f16                   dst, src0, src1
+v_cmpx_u_f16_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_u_f32                   dst, src0, src1
+v_cmpx_u_f32_sdwa              dst, src0, src1                <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-clamp"><span class="std std-ref">clamp</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src0-sel"><span class="std std-ref">src0_sel</span></a> <a class="reference internal" href="AMDGPUOperandSyntax.html#amdgpu-synid-src1-sel"><span class="std std-ref">src1_sel</span></a>
+v_cmpx_u_f64                   dst, src0, src1
+</pre>
+</div>
+</div>
+
+
+          </div>
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