[PATCH] D52216: [AArch64] Support adding X[8-15, 18] registers as CSRs.

[Tri Vo via Phabricator via llvm-commits]

trong updated this revision to Diff 166048.
trong added a comment.

- Added UpdateMaskCustomCall() util function to AArch64ISelLowering.
- Added test for case when x18 is specified as both reserved and call-saved.


Repository:
  rL LLVM

https://reviews.llvm.org/D52216

Files:
  lib/Target/AArch64/AArch64.td
  lib/Target/AArch64/AArch64CallLowering.cpp
  lib/Target/AArch64/AArch64FastISel.cpp
  lib/Target/AArch64/AArch64FrameLowering.cpp
  lib/Target/AArch64/AArch64ISelLowering.cpp
  lib/Target/AArch64/AArch64ISelLowering.h
  lib/Target/AArch64/AArch64RegisterInfo.cpp
  lib/Target/AArch64/AArch64RegisterInfo.h
  lib/Target/AArch64/AArch64Subtarget.cpp
  lib/Target/AArch64/AArch64Subtarget.h
  test/CodeGen/AArch64/arm64-custom-call-saved-reg.ll
  test/CodeGen/AArch64/arm64-reserve-call-saved-reg.ll

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