[llvm] r342457 - Fixes removal of dead elements from PressureDiff (PR37252).

Yury Gribov via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 18 02:53:43 PDT 2018


Author: ygribov
Date: Tue Sep 18 02:53:42 2018
New Revision: 342457

URL: http://llvm.org/viewvc/llvm-project?rev=342457&view=rev
Log:
Fixes removal of dead elements from PressureDiff (PR37252).

Reviewed By: MatzeB

Differential Revision: https://reviews.llvm.org/D51495

Modified:
    llvm/trunk/lib/CodeGen/RegisterPressure.cpp
    llvm/trunk/test/CodeGen/X86/GlobalISel/gep.ll
    llvm/trunk/test/CodeGen/X86/divrem.ll
    llvm/trunk/test/CodeGen/X86/divrem8_ext.ll

Modified: llvm/trunk/lib/CodeGen/RegisterPressure.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/RegisterPressure.cpp?rev=342457&r1=342456&r2=342457&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/RegisterPressure.cpp (original)
+++ llvm/trunk/lib/CodeGen/RegisterPressure.cpp Tue Sep 18 02:53:42 2018
@@ -681,8 +681,7 @@ void PressureDiff::addPressureChange(uns
       PressureDiff::iterator J;
       for (J = std::next(I); J != E && J->isValid(); ++J, ++I)
         *I = *J;
-      if (J != E)
-        *I = *J;
+      *I = PressureChange();
     }
   }
 }

Modified: llvm/trunk/test/CodeGen/X86/GlobalISel/gep.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/GlobalISel/gep.ll?rev=342457&r1=342456&r2=342457&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/GlobalISel/gep.ll (original)
+++ llvm/trunk/test/CodeGen/X86/GlobalISel/gep.ll Tue Sep 18 02:53:42 2018
@@ -6,12 +6,12 @@ define i32* @test_gep_i8(i32 *%arr, i8 %
 ; X64_GISEL-LABEL: test_gep_i8:
 ; X64_GISEL:       # %bb.0:
 ; X64_GISEL-NEXT:    # kill: def $esi killed $esi def $rsi
-; X64_GISEL-NEXT:    movq $4, %rax
 ; X64_GISEL-NEXT:    movq $56, %rcx
 ; X64_GISEL-NEXT:    # kill: def $cl killed $rcx
 ; X64_GISEL-NEXT:    shlq %cl, %rsi
 ; X64_GISEL-NEXT:    movq $56, %rcx
 ; X64_GISEL-NEXT:    # kill: def $cl killed $rcx
+; X64_GISEL-NEXT:    movq $4, %rax
 ; X64_GISEL-NEXT:    sarq %cl, %rsi
 ; X64_GISEL-NEXT:    imulq %rax, %rsi
 ; X64_GISEL-NEXT:    leaq (%rdi,%rsi), %rax
@@ -46,12 +46,12 @@ define i32* @test_gep_i16(i32 *%arr, i16
 ; X64_GISEL-LABEL: test_gep_i16:
 ; X64_GISEL:       # %bb.0:
 ; X64_GISEL-NEXT:    # kill: def $esi killed $esi def $rsi
-; X64_GISEL-NEXT:    movq $4, %rax
 ; X64_GISEL-NEXT:    movq $48, %rcx
 ; X64_GISEL-NEXT:    # kill: def $cl killed $rcx
 ; X64_GISEL-NEXT:    shlq %cl, %rsi
 ; X64_GISEL-NEXT:    movq $48, %rcx
 ; X64_GISEL-NEXT:    # kill: def $cl killed $rcx
+; X64_GISEL-NEXT:    movq $4, %rax
 ; X64_GISEL-NEXT:    sarq %cl, %rsi
 ; X64_GISEL-NEXT:    imulq %rax, %rsi
 ; X64_GISEL-NEXT:    leaq (%rdi,%rsi), %rax

Modified: llvm/trunk/test/CodeGen/X86/divrem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/divrem.ll?rev=342457&r1=342456&r2=342457&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/divrem.ll (original)
+++ llvm/trunk/test/CodeGen/X86/divrem.ll Tue Sep 18 02:53:42 2018
@@ -57,11 +57,11 @@ define void @si32(i32 %x, i32 %y, i32* %
 ; X32-LABEL: si32:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushl %esi
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    cltd
 ; X32-NEXT:    idivl {{[0-9]+}}(%esp)
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; X32-NEXT:    movl %eax, (%esi)
 ; X32-NEXT:    movl %edx, (%ecx)
 ; X32-NEXT:    popl %esi
@@ -87,11 +87,11 @@ define void @si16(i16 %x, i16 %y, i16* %
 ; X32-LABEL: si16:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushl %esi
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; X32-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    cwtd
 ; X32-NEXT:    idivw {{[0-9]+}}(%esp)
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; X32-NEXT:    movw %ax, (%esi)
 ; X32-NEXT:    movw %dx, (%ecx)
 ; X32-NEXT:    popl %esi
@@ -117,11 +117,11 @@ define void @si8(i8 %x, i8 %y, i8* %p, i
 ; X32-LABEL: si8:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushl %ebx
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %edx
 ; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
 ; X32-NEXT:    cbtw
 ; X32-NEXT:    idivb {{[0-9]+}}(%esp)
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %edx
 ; X32-NEXT:    movsbl %ah, %ebx
 ; X32-NEXT:    movb %al, (%edx)
 ; X32-NEXT:    movb %bl, (%ecx)
@@ -199,11 +199,11 @@ define void @ui32(i32 %x, i32 %y, i32* %
 ; X32-LABEL: ui32:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushl %esi
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; X32-NEXT:    movl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    xorl %edx, %edx
 ; X32-NEXT:    divl {{[0-9]+}}(%esp)
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; X32-NEXT:    movl %eax, (%esi)
 ; X32-NEXT:    movl %edx, (%ecx)
 ; X32-NEXT:    popl %esi
@@ -229,11 +229,11 @@ define void @ui16(i16 %x, i16 %y, i16* %
 ; X32-LABEL: ui16:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushl %esi
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; X32-NEXT:    movzwl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    xorl %edx, %edx
 ; X32-NEXT:    divw {{[0-9]+}}(%esp)
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %esi
 ; X32-NEXT:    movw %ax, (%esi)
 ; X32-NEXT:    movw %dx, (%ecx)
 ; X32-NEXT:    popl %esi
@@ -259,11 +259,11 @@ define void @ui8(i8 %x, i8 %y, i8* %p, i
 ; X32-LABEL: ui8:
 ; X32:       # %bb.0:
 ; X32-NEXT:    pushl %ebx
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
-; X32-NEXT:    movl {{[0-9]+}}(%esp), %edx
 ; X32-NEXT:    movzbl {{[0-9]+}}(%esp), %eax
 ; X32-NEXT:    # kill: def $eax killed $eax def $ax
 ; X32-NEXT:    divb {{[0-9]+}}(%esp)
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %ecx
+; X32-NEXT:    movl {{[0-9]+}}(%esp), %edx
 ; X32-NEXT:    movzbl %ah, %ebx
 ; X32-NEXT:    movb %al, (%edx)
 ; X32-NEXT:    movb %bl, (%ecx)

Modified: llvm/trunk/test/CodeGen/X86/divrem8_ext.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/divrem8_ext.ll?rev=342457&r1=342456&r2=342457&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/divrem8_ext.ll (original)
+++ llvm/trunk/test/CodeGen/X86/divrem8_ext.ll Tue Sep 18 02:53:42 2018
@@ -150,8 +150,8 @@ define i8 @test_srem_noext_ah(i8 %x, i8
 ; X32-LABEL: test_srem_noext_ah:
 ; X32:       # %bb.0:
 ; X32-NEXT:    movb {{[0-9]+}}(%esp), %al
-; X32-NEXT:    movb {{[0-9]+}}(%esp), %cl
 ; X32-NEXT:    cbtw
+; X32-NEXT:    movb {{[0-9]+}}(%esp), %cl
 ; X32-NEXT:    idivb %cl
 ; X32-NEXT:    movsbl %ah, %eax
 ; X32-NEXT:    addb %cl, %al




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