[PATCH] D51856: [llvm-exegesis] Improve Register Setup.

[Clement Courbet via Phabricator via llvm-commits]

courbet added inline comments.


================
Comment at: tools/llvm-exegesis/lib/AArch64/Target.cpp:32
+
+static unsigned GetLoadImmediateOpcode(unsigned RegBitWidth) {
+  switch (RegBitWidth) {
----------------
getLoadImmediateOpcode


================
Comment at: tools/llvm-exegesis/lib/Assembler.cpp:37
+  for (const RegisterValue &RV : RegisterInitialValues) {
+    const auto SetRegisterCode = ET.setRegTo(*MSI, RV.Register, RV.Value);
+    Result.insert(Result.end(), SetRegisterCode.begin(), SetRegisterCode.end());
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Please keep the comment.


================
Comment at: tools/llvm-exegesis/lib/Assembler.cpp:183
-  // means that we won't know what values are in the registers.
-  if (!IsSnippetSetupComplete)
-    Properties.reset(llvm::MachineFunctionProperties::Property::TracksLiveness);
----------------
You need to keep this.


Repository:
  rL LLVM

https://reviews.llvm.org/D51856