[PATCH] D48491: [X86] Select BEXTR when there is only BMI1.
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 17 03:28:23 PDT 2018
RKSimon added a comment.
In https://reviews.llvm.org/D48491#1236464, @lebedev.ri wrote:
> In https://reviews.llvm.org/D48491#1236394, @craig.topper wrote:
>
> > Can we DAG combine to X86ISD::BEXTR for these cases? Then we can properly check one use of the inner parts of the pattern.
>
>
> Do we care whether the *entire* old patter goes away, or just one more instruction?
> But yes, should work, let's see.
Hopefully combining in DAG would help https://bugs.llvm.org/show_bug.cgi?id=38938.
Not sure if we should allow TBM BEXTR (imm) more leniently than BMI1 BEXTR (reg)?
Repository:
rL LLVM
https://reviews.llvm.org/D48491
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