[PATCH] D52123: [AMDGPU] Initialize instruction itinerary from GCNSubtarget
Stanislav Mekhanoshin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 14 14:38:29 PDT 2018
rampitec created this revision.
rampitec added a reviewer: kzhuravl.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, arsenm.
I need to use it in the GCN codegen.
https://reviews.llvm.org/D52123
Files:
lib/Target/AMDGPU/AMDGPUSubtarget.cpp
lib/Target/AMDGPU/AMDGPUSubtarget.h
Index: lib/Target/AMDGPU/AMDGPUSubtarget.h
===================================================================
--- lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -297,6 +297,7 @@
Triple TargetTriple;
unsigned Gen;
unsigned IsaVersion;
+ InstrItineraryData InstrItins;
int LDSBankCount;
unsigned MaxPrivateElementSize;
@@ -420,6 +421,10 @@
return &TSInfo;
}
+ const InstrItineraryData *getInstrItineraryData() const override {
+ return &InstrItins;
+ }
+
void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
Generation getGeneration() const {
Index: lib/Target/AMDGPU/AMDGPUSubtarget.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+++ lib/Target/AMDGPU/AMDGPUSubtarget.cpp
@@ -149,6 +149,7 @@
TargetTriple(TT),
Gen(SOUTHERN_ISLANDS),
IsaVersion(ISAVersion0_0_0),
+ InstrItins(getInstrItineraryForCPU(GPU)),
LDSBankCount(0),
MaxPrivateElementSize(0),
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D52123.165594.patch
Type: text/x-patch
Size: 1024 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180914/ed9f3db7/attachment.bin>
More information about the llvm-commits
mailing list