[PATCH] D52140: [X86] Add initial SimplifyDemandedVectorEltsForTargetNode support

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon created this revision.
RKSimon added reviewers: craig.topper, spatel, andreadb, efriedma, niravd.

This patch adds an initial x86 SimplifyDemandedVectorEltsForTargetNode implementation to handle target shuffles.

Currently the patch only decodes a target shuffle, calls SimplifyDemandedVectorElts on its input operands and removes any shuffle that reduces to undef/zero/identity.

Future work will need to integrate this with combineX86ShufflesRecursively, add support for other x86 ops, etc.

A change had to be made to a test in extractelement-load.ll to prevent complete reduction due to improved undef propagation.

NOTE: There is a minor regression that appears to be affecting further (extractelement?) combines which I haven't been able to solve yet - possibly something to do with how nodes are added to the worklist after simplification.


Repository:
  rL LLVM

https://reviews.llvm.org/D52140

Files:
  lib/Target/X86/X86ISelLowering.cpp
  lib/Target/X86/X86ISelLowering.h
  test/CodeGen/X86/2012-01-12-extract-sv.ll
  test/CodeGen/X86/combine-sdiv.ll
  test/CodeGen/X86/combine-srem.ll
  test/CodeGen/X86/dagcombine-cse.ll
  test/CodeGen/X86/extractelement-load.ll
  test/CodeGen/X86/insertps-combine.ll
  test/CodeGen/X86/oddshuffles.ll
  test/CodeGen/X86/pr13577.ll
  test/CodeGen/X86/pr34592.ll
  test/CodeGen/X86/reduce-trunc-shl.ll
  test/CodeGen/X86/urem-seteq-vec-nonsplat.ll
  test/CodeGen/X86/vec_extract-sse4.ll
  test/CodeGen/X86/vec_insert-3.ll
  test/CodeGen/X86/vector-constrained-fp-intrinsics.ll
  test/CodeGen/X86/vector-rotate-128.ll
  test/CodeGen/X86/vector-shuffle-128-v4.ll
  test/CodeGen/X86/vector-trunc.ll

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