[PATCH] D52009: [WebAssembly] SIMD neg
Thomas Lively via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 14 14:50:56 PDT 2018
tlively added inline comments.
================
Comment at: lib/Target/WebAssembly/WebAssemblyInstrSIMD.td:157
+ defm "" : SIMDNeg<vec_t, vec, splat_pat, lane_t, fsub, (lane_t fpimm0),
+ simdop>;
+}
----------------
aheejin wrote:
> Can't this be 0.0 or something like the integer case?
No, unfortunately tablegen does not support floating point literals. This is the standard solution used in multiple backends.
Repository:
rL LLVM
https://reviews.llvm.org/D52009
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