[PATCH] D18086: Fix default processor name for armv6k.

[Peter Smith via Phabricator via llvm-commits]

peter.smith added a comment.

I think the natural default CPU for ARMv6K is the "mpcore". The K stands for kernel extensions and includes the load,store and clear exclusive instructions but otherwise no effect on code generation. I would expect that ARMv6KZ includes the instructions for trustzone such as SMC (secure monitor call) but again, this doesn't have an effect on code generation.



================
Comment at: include/llvm/Support/ARMTargetParser.def:182
 ARM_CPU_NAME("arm1136jz-s", AK_ARMV6, FK_NONE, false, AEK_NONE)
-ARM_CPU_NAME("arm1176j-s", AK_ARMV6K, FK_NONE, true, AEK_NONE)
+ARM_CPU_NAME("arm1176jz-s", AK_ARMV6K, FK_NONE, false, AEK_NONE)
+ARM_CPU_NAME("arm1176jzf-s", AK_ARMV6K, FK_VFPV2, true, AEK_NONE)
----------------
rengolin wrote:
> peter.smith wrote:
> > rengolin wrote:
> > > srhines wrote:
> > > > This uses the same name as line 184, which seems like a bug to me.
> > > I think that's what @labrinea was talking about.
> > > 
> > > Can anyone from Arm confirm what "j-s" really is, if it is anything at all?
> > > 
> > > I had so many conversations about this in the past and all of them got me even more confused than before.
> > The j stands for Jazelle (https://en.wikipedia.org/wiki/Jazelle) which was a Thumb like mode that could be entered with I think the BXJ mode. This would allow the processor to execute a handful of the most common Java bytecodes. The only affect that this would have on LLVM would potentially be to enable the BXJ instruction. Personally I don't think it is worth it given that direct execution of bytecodes lost out to JIT compilers so I don't expect anyone actually wanting to use it.
> > 
> > The s stands for synthesizable. This means that the design was available to hardware licensees in VHDL rather than as a fixed macrocell. Obviously this makes no difference to code-generation.
> > 
> > 
> Sorry Peter, I should have been more clear. I meant what is "j-s", armv6, 6k, 6kz? 
> 
> But you answered my question, it isn't. Any of them. 
> 
> So, the natural question here is: what is the default for armv6k? 
Looking at ARM Compiler 5 which has quite a good mapping between the Architectures and CPU names. I get:
| ARM1136J-S | ARMv6 |
| ARM1136JF-S | ARMv6 |
| ARM1136J-S-rev1 | ARMv6K |
| ARM1136JF-S rev1 | ARMv6K |
| ARM11MPCore | ARMv6K |
| ARM1176JZ-S | ARMv6KZ |
| ARM1176JZF-S | ARMv6KZ |

The Arm1136 TRM (Technical Reference Manual ) http://infocenter.arm.com/help/topic/com.arm.doc.ddi0211h/DDI0211.pdf has:

```
The ARMv6k architecture features were introduce in the rev1 (r1p0) release of the ARM1136JF-S processor. This means  that the LDREXB, LDREXH, LDREXD, STREXB, STREXH, STREXD, and CLREX instructions are only available from the rev1 (r1p0) release of the processor. 
```

To summarise. If we are being safe then we say arm1136jf-s and arm1136j-s are ARMv6 (GCC does this). The next CPU down the list that is always ARMv6k is mpcore.

Looking at the code I think: 
Line 181 should be removed as the CPU doesn't exist (gcc doesn't support it either).
ARM_CPU_NAME("arm1136jz-s", AK_ARMV6, FK_NONE, false, AEK_NONE)

Line 182 should be removed as arm1176jz-s is incorrectly given AK_ARMV6K here but appears correctly on line 184.
ARM_CPU_NAME("arm1176jz-s", AK_ARMV6K, FK_NONE, false, AEK_NONE)

Line 183 should be removed as arm1176jzf-s is incorrectly given AK_ARMV6K here but appears correctly on line 187.
ARM_CPU_NAME("arm1176jzf-s", AK_ARMV6K, FK_VFPV2, true, AEK_NONE)


https://reviews.llvm.org/D18086