[PATCH] D51502: [X86] Fix register resizings for inline assembly register operands.

[Nick Desaulniers via Phabricator via llvm-commits]

nickdesaulniers added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:41225
+      if (Size==64 && !is64Bit) {
+        //Model GCC's behavior here and select a fixed pair of 32-bit registers.
+        switch (Res.first) {
----------------
xbolva00 wrote:
> if (Size == 64
space between `//` and `Model`?


Repository:
  rL LLVM

https://reviews.llvm.org/D51502