[PATCH] D51995: AMDGPU: Generate VALU ThreeOp Integer instructions

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 12 20:16:03 PDT 2018


arsenm added a comment.

Needs some edge case tests where the values are uniform but still need to be in a VGPR



================
Comment at: test/CodeGen/AMDGPU/add3.ll:1-2
+;RUN: llc < %s -march=amdgcn -mcpu=gfx900 | FileCheck -check-prefix=GCN %s
+
+; ===================================================================================
----------------
Needs a run line with a target that doesn't have these instructions to make sure they aren't emitted


Repository:
  rL LLVM

https://reviews.llvm.org/D51995





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