[PATCH] D48581: [AArch64] Support reserving x1-7 registers.

Tri Vo via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 12 16:46:32 PDT 2018


This revision was automatically updated to reflect the committed changes.
Closed by commit rL342100: [AArch64] Support reserving x1-7 registers. (authored by trong, committed by ).
Herald added a subscriber: llvm-commits.

Changed prior to commit:
  https://reviews.llvm.org/D48581?vs=165132&id=165179#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D48581

Files:
  cfe/trunk/docs/ClangCommandLineReference.rst
  cfe/trunk/include/clang/Driver/Options.td
  cfe/trunk/lib/Driver/ToolChains/Arch/AArch64.cpp
  cfe/trunk/test/Driver/aarch64-fixed-x-register.c
  cfe/trunk/test/Driver/aarch64-fixed-x18.c
  cfe/trunk/test/Driver/aarch64-fixed-x20.c

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