[PATCH] D51932: [AMDGPU] Fix-up cases where writelane has 2 SGPR operands

Stanislav Mekhanoshin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 11 14:18:46 PDT 2018


rampitec added inline comments.


================
Comment at: lib/Target/AMDGPU/SIFixSGPRCopies.cpp:457
+
+  for (MachineFunction::iterator BI = MF.begin(), BE = MF.end(); BI != BE;
+       ++BI) {
----------------
dstuttard wrote:
> rampitec wrote:
> > Why cannot you use loop in the runOnMachineFunction()?
> I think we need all the sgpr to vgpr moves to have been completed before applying this fix since in some cases it might not be necessary.
> I guess there's an argument for this to be done in a separate pass, or a later pass, then it could go into runOnMachineFunction - any suggestions?
Given the semantics of writelane it is hard to believe its sources will be moved to VALU. Also if that is going to happen in general, it should have already happened by the time iterator would reach the instruction.


Repository:
  rL LLVM

https://reviews.llvm.org/D51932





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