[PATCH] D51940: [X86] Teach X86FastISel::X86SelectRet to use EAX for the sret pointer in GNUX32

[Phabricator via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL341972: [X86] Teach X86FastISel::X86SelectRet to use EAX for the sret pointer in GNUX32 (authored by ctopper, committed by ).

Changed prior to commit:
  https://reviews.llvm.org/D51940?vs=164924&id=164933#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D51940

Files:
  llvm/trunk/lib/Target/X86/X86FastISel.cpp
  llvm/trunk/test/CodeGen/X86/pr38865-2.ll


Index: llvm/trunk/test/CodeGen/X86/pr38865-2.ll
===================================================================
--- llvm/trunk/test/CodeGen/X86/pr38865-2.ll
+++ llvm/trunk/test/CodeGen/X86/pr38865-2.ll
@@ -0,0 +1,23 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -O0 -mtriple=x86_64-unknown-linux-gnux32 | FileCheck %s
+
+target datalayout = "e-m:e-p:32:32-i64:64-f80:128-n8:16:32:64-S128"
+
+%struct.a = type { i8 }
+
+define void @_Z1bv(%struct.a* noalias sret %agg.result) {
+; CHECK-LABEL: _Z1bv:
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    pushq %rax
+; CHECK-NEXT:    .cfi_def_cfa_offset 16
+; CHECK-NEXT:    movl %edi, %eax
+; CHECK-NEXT:    movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
+; CHECK-NEXT:    callq _Z1bv
+; CHECK-NEXT:    movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
+; CHECK-NEXT:    popq %rcx
+; CHECK-NEXT:    .cfi_def_cfa_offset 8
+; CHECK-NEXT:    retq
+entry:
+  call void @_Z1bv(%struct.a* sret %agg.result)
+  ret void
+}
Index: llvm/trunk/lib/Target/X86/X86FastISel.cpp
===================================================================
--- llvm/trunk/lib/Target/X86/X86FastISel.cpp
+++ llvm/trunk/lib/Target/X86/X86FastISel.cpp
@@ -1278,7 +1278,7 @@
     unsigned Reg = X86MFInfo->getSRetReturnReg();
     assert(Reg &&
            "SRetReturnReg should have been set in LowerFormalArguments()!");
-    unsigned RetReg = Subtarget->is64Bit() ? X86::RAX : X86::EAX;
+    unsigned RetReg = Subtarget->isTarget64BitLP64() ? X86::RAX : X86::EAX;
     BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
             TII.get(TargetOpcode::COPY), RetReg).addReg(Reg);
     RetRegs.push_back(RetReg);


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