[PATCH] D50944: [Hexagon] [Test] Remove undef and infinite loop from test
Phabricator via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 11 07:09:05 PDT 2018
This revision was automatically updated to reflect the committed changes.
Closed by commit rL341943: [Hexagon] [Test] Remove undef and infinite loop from test (authored by lebedevri, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D50944?vs=163458&id=164870#toc
Repository:
rL LLVM
https://reviews.llvm.org/D50944
Files:
llvm/trunk/test/CodeGen/Hexagon/swp-const-tc2.ll
Index: llvm/trunk/test/CodeGen/Hexagon/swp-const-tc2.ll
===================================================================
--- llvm/trunk/test/CodeGen/Hexagon/swp-const-tc2.ll
+++ llvm/trunk/test/CodeGen/Hexagon/swp-const-tc2.ll
@@ -6,17 +6,17 @@
; In the bug, the final CFG contains two iterations of the loop.
; CHECK-NOT: loop0
-; CHECK: = mpy
-; CHECK-NOT: = mpy
+; CHECK: r{{[0-9]+}} = mpyi
+; CHECK-NOT: r{{[0-9]+}} = mpyi
-define void @f0() {
+define i32 @f0(i32* %a0) {
b0:
br label %b1
b1: ; preds = %b1, %b0
%v0 = phi i32 [ 0, %b0 ], [ %v9, %b1 ]
%v1 = phi i32 [ 0, %b0 ], [ %v8, %b1 ]
- %v2 = load i32, i32* undef, align 4
+ %v2 = load i32, i32* %a0, align 4
%v3 = add nsw i32 %v1, 1
%v4 = srem i32 %v2, 3
%v5 = icmp ne i32 %v4, 0
@@ -32,5 +32,5 @@
br label %b3
b3: ; preds = %b3, %b2
- br label %b3
+ ret i32 %v11
}
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D50944.164870.patch
Type: text/x-patch
Size: 960 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180911/100620b4/attachment.bin>
More information about the llvm-commits
mailing list