[PATCH] D51734: [AMDGPU] Preliminary patch for divergence driven instruction selection. Immediate selection predicate changed

[Alexander via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL341928: [AMDGPU] Preliminary patch for divergence driven instruction selection. (authored by alex-t, committed by ).
Herald added a subscriber: llvm-commits.

Changed prior to commit:
  https://reviews.llvm.org/D51734?vs=164218&id=164849#toc

Repository:
  rL LLVM

https://reviews.llvm.org/D51734

Files:
  llvm/trunk/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.cpp
  llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.h
  llvm/trunk/lib/Target/AMDGPU/SIInstrInfo.td
  llvm/trunk/test/CodeGen/AMDGPU/amdgpu.private-memory.ll
  llvm/trunk/test/CodeGen/AMDGPU/clamp.ll
  llvm/trunk/test/CodeGen/AMDGPU/commute-compares.ll
  llvm/trunk/test/CodeGen/AMDGPU/commute_modifiers.ll
  llvm/trunk/test/CodeGen/AMDGPU/control-flow-fastregalloc.ll
  llvm/trunk/test/CodeGen/AMDGPU/ctlz_zero_undef.ll
  llvm/trunk/test/CodeGen/AMDGPU/ctpop.ll
  llvm/trunk/test/CodeGen/AMDGPU/ctpop16.ll
  llvm/trunk/test/CodeGen/AMDGPU/dagcombine-setcc-select.ll
  llvm/trunk/test/CodeGen/AMDGPU/fcanonicalize-elimination.ll
  llvm/trunk/test/CodeGen/AMDGPU/fdiv32-to-rcp-folding.ll
  llvm/trunk/test/CodeGen/AMDGPU/fexp.ll
  llvm/trunk/test/CodeGen/AMDGPU/fneg-combines.ll
  llvm/trunk/test/CodeGen/AMDGPU/immv216.ll
  llvm/trunk/test/CodeGen/AMDGPU/insert_vector_elt.v2i16.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.class.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.div.fixup.f16.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.div.scale.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.fcmp.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.f16.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.fmad.ftz.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.fmed3.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.kill.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.lerp.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.msad.u8.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.sad.hi.u8.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u16.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.amdgcn.sad.u8.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.cos.f16.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.fma.f16.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.fmuladd.f16.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.log.f16.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.log.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.log10.f16.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.log10.ll
  llvm/trunk/test/CodeGen/AMDGPU/llvm.sin.f16.ll
  llvm/trunk/test/CodeGen/AMDGPU/mad-mix.ll
  llvm/trunk/test/CodeGen/AMDGPU/madmk.ll
  llvm/trunk/test/CodeGen/AMDGPU/sdiv.ll
  llvm/trunk/test/CodeGen/AMDGPU/select.f16.ll
  llvm/trunk/test/CodeGen/AMDGPU/setcc-opt.ll
  llvm/trunk/test/CodeGen/AMDGPU/srem.ll
  llvm/trunk/test/CodeGen/AMDGPU/subreg-coalescer-undef-use.ll
  llvm/trunk/test/CodeGen/AMDGPU/udiv.ll
  llvm/trunk/test/CodeGen/AMDGPU/urem.ll
  llvm/trunk/test/CodeGen/AMDGPU/use-sgpr-multiple-times.ll
  llvm/trunk/test/CodeGen/AMDGPU/valu-i1.ll
  llvm/trunk/test/CodeGen/AMDGPU/wqm.ll

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