[PATCH] D51906: [WebAssembly] SIMD shifts

[Thomas Lively via Phabricator via llvm-commits]

tlively created this revision.
tlively added reviewers: aheejin, dschuff.
Herald added subscribers: llvm-commits, sunfish, jgravelle-google, sbc100.

Implement shifts of vectors by i32. Since LLVM defines shifts as
binary operations between two vectors, this involves pattern matching
on splatted shift operands. For v2i64 shifts any i32 shift operands
have to be zero extended in the input and any i64 shift operands have
to be wrapped in the output.


Repository:
  rL LLVM

https://reviews.llvm.org/D51906

Files:
  lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
  test/CodeGen/WebAssembly/simd-arith.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D51906.164785.patch
Type: text/x-patch
Size: 12726 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20180911/cea9df6b/attachment.bin>