[PATCH] D51502: [X86] Fix register resizings for inline assembly register operands.

[Nirav Dave via Phabricator via llvm-commits]

niravd updated this revision to Diff 164670.
niravd edited the summary of this revision.
niravd added a comment.

Match GCC's register assignment behavior. This causes some minor test case reordering from the introduced register classes. Interestingly unfold-masked-merge-vector-variablemask.ll has slightly fewer spills.

I'm working on a follow up patch to add warnings for these cases, but this should be okay to go in now.


Repository:
  rL LLVM

https://reviews.llvm.org/D51502

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/lib/Target/X86/X86RegisterInfo.td
  llvm/test/CodeGen/X86/atomic_mi.ll
  llvm/test/CodeGen/X86/avx512-regcall-Mask.ll
  llvm/test/CodeGen/X86/physreg-pairs-error.ll
  llvm/test/CodeGen/X86/physreg-pairs.ll
  llvm/test/CodeGen/X86/unfold-masked-merge-vector-variablemask.ll

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