[PATCH] D51845: AMDGPU: Remove leftovers from configurable address spaces
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 9 20:09:51 PDT 2018
arsenm created this revision.
arsenm added a reviewer: rampitec.
Herald added subscribers: t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl.
https://reviews.llvm.org/D51845
Files:
lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
Index: lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
===================================================================
--- lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
+++ lib/Target/AMDGPU/AMDGPUAliasAnalysis.h
@@ -36,10 +36,9 @@
public:
explicit AMDGPUAAResult(const DataLayout &DL, Triple T) : AAResultBase(),
- DL(DL), ASAliasRules(T.getArch()) {}
+ DL(DL) {}
AMDGPUAAResult(AMDGPUAAResult &&Arg)
- : AAResultBase(std::move(Arg)), DL(Arg.DL),
- ASAliasRules(Arg.ASAliasRules){}
+ : AAResultBase(std::move(Arg)), DL(Arg.DL) {}
/// Handle invalidation events from the new pass manager.
///
@@ -52,17 +51,6 @@
private:
bool Aliases(const MDNode *A, const MDNode *B) const;
bool PathAliases(const MDNode *A, const MDNode *B) const;
-
- class ASAliasRulesTy {
- public:
- ASAliasRulesTy(Triple::ArchType Arch_);
-
- AliasResult getAliasResult(unsigned AS1, unsigned AS2) const;
-
- private:
- Triple::ArchType Arch;
- const AliasResult (*ASAliasRules)[7][7];
- } ASAliasRules;
};
/// Analysis pass providing a never-invalidated alias analysis result.
Index: lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
===================================================================
--- lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
+++ lib/Target/AMDGPU/AMDGPUAliasAnalysis.cpp
@@ -54,45 +54,35 @@
AU.setPreservesAll();
}
-// Must match the table in getAliasResult.
-AMDGPUAAResult::ASAliasRulesTy::ASAliasRulesTy(Triple::ArchType Arch_)
- : Arch(Arch_) {
- // These arrarys are indexed by address space value
- // enum elements 0 ... to 6
- static const AliasResult ASAliasRulesGenIsZero[7][7] = {
+// These arrays are indexed by address space value enum elements 0 ... to 6
+static const AliasResult ASAliasRules[7][7] = {
/* Flat Global Region Group Constant Private Constant 32-bit */
/* Flat */ {MayAlias, MayAlias, MayAlias, MayAlias, MayAlias, MayAlias, MayAlias},
/* Global */ {MayAlias, MayAlias, NoAlias , NoAlias , MayAlias, NoAlias , MayAlias},
/* Region */ {MayAlias, NoAlias , NoAlias , NoAlias, MayAlias, NoAlias , MayAlias},
/* Group */ {MayAlias, NoAlias , NoAlias , MayAlias, NoAlias , NoAlias , NoAlias},
/* Constant */ {MayAlias, MayAlias, MayAlias, NoAlias , NoAlias, NoAlias , MayAlias},
/* Private */ {MayAlias, NoAlias , NoAlias , NoAlias , NoAlias , MayAlias, NoAlias},
/* Constant 32-bit */ {MayAlias, MayAlias, MayAlias, NoAlias , MayAlias, NoAlias , NoAlias}
- };
+};
+static AliasResult getAliasResult(unsigned AS1, unsigned AS2) {
static_assert(AMDGPUAS::MAX_AMDGPU_ADDRESS <= 6, "Addr space out of range");
- ASAliasRules = &ASAliasRulesGenIsZero;
-}
-
-AliasResult AMDGPUAAResult::ASAliasRulesTy::getAliasResult(unsigned AS1,
- unsigned AS2) const {
- if (AS1 > AMDGPUAS::MAX_AMDGPU_ADDRESS || AS2 > AMDGPUAS::MAX_AMDGPU_ADDRESS) {
- if (Arch == Triple::amdgcn)
- report_fatal_error("Pointer address space out of range");
- return AS1 == AS2 ? MayAlias : NoAlias;
- }
+ if (AS1 > AMDGPUAS::MAX_AMDGPU_ADDRESS || AS2 > AMDGPUAS::MAX_AMDGPU_ADDRESS)
+ return MayAlias;
- return (*ASAliasRules)[AS1][AS2];
+ return ASAliasRules[AS1][AS2];
}
AliasResult AMDGPUAAResult::alias(const MemoryLocation &LocA,
const MemoryLocation &LocB) {
unsigned asA = LocA.Ptr->getType()->getPointerAddressSpace();
unsigned asB = LocB.Ptr->getType()->getPointerAddressSpace();
- AliasResult Result = ASAliasRules.getAliasResult(asA, asB);
- if (Result == NoAlias) return Result;
+ AliasResult Result = getAliasResult(asA, asB);
+ if (Result == NoAlias)
+ return Result;
// Forward the query to the next alias analysis.
return AAResultBase::alias(LocA, LocB);
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