[PATCH] D48580: [AArch64] Support reserving x1-7 registers.

[Kristof Beyls via Phabricator via llvm-commits]

kristof.beyls added inline comments.


================
Comment at: lib/Target/AArch64/AArch64.td:102
 
-def FeatureReserveX18 : SubtargetFeature<"reserve-x18", "ReserveX18", "true",
-                                         "Reserve X18, making it unavailable "
-                                         "as a GPR">;
-
-def FeatureReserveX20 : SubtargetFeature<"reserve-x20", "ReserveX20", "true",
-                                         "Reserve X20, making it unavailable "
-                                         "as a GPR">;
+foreach i = {1-7,18,20} in
+    def FeatureReserveX#i : SubtargetFeature<"reserve-x"#i, "ReserveXRegister["#i#"]", "true",
----------------
trong wrote:
> manojgupta wrote:
> > Can you support reserving all of the registers instead of a subset?
> We probably can't reliably reserve some registers, e.g. x16, x17. And we would need more error handling for special usages of x19, x29 (maybe more). But I'd like to keep this change down to x1-7 since those are the ones that will actually be used.
I've been told that there are more projects than just the linux kernel using -ffixed-//reg// command line options.
Indeed if I Google search with the following command, I see quite a few projects on github using this command line option (not necessarily for an AArch64 target):
`"-ffixed-" site:github.com -"-ffixed-line-length" -"-ffixed-form"`

That being said, I'm happy for this functionality to be added incrementally, for now just focussing on what happens to be needed for the linux kernel. As long as it's clear that at some point in the future this feature may need to be extended.


https://reviews.llvm.org/D48580