[llvm] r341493 - NFC: more memset inline arm64 coverage
JF Bastien via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 5 13:35:07 PDT 2018
Author: jfb
Date: Wed Sep 5 13:35:06 2018
New Revision: 341493
URL: http://llvm.org/viewvc/llvm-project?rev=341493&view=rev
Log:
NFC: more memset inline arm64 coverage
I'm looking at some codegen optimization in this area and want to make sure I understand the current codegen and don't regress it. This patch further expands the tests (which I already expanded in r341406) to capture more of the current code generation when it comes to stack-based small non-zero memset on arm64. This patch annotates some potential fixes.
Modified:
llvm/trunk/test/CodeGen/AArch64/arm64-memset-inline.ll
Modified: llvm/trunk/test/CodeGen/AArch64/arm64-memset-inline.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/arm64-memset-inline.ll?rev=341493&r1=341492&r2=341493&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/arm64-memset-inline.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/arm64-memset-inline.ll Wed Sep 5 13:35:06 2018
@@ -137,6 +137,7 @@ define void @bzero_32_stack() {
ret void
}
+; FIXME These don't pair up because the offset isn't a multiple of 16 bits. x0, however, could be used as a base for a paired store.
define void @bzero_40_stack() {
; CHECK-LABEL: bzero_40_stack:
; CHECK: stp xzr, x30, [sp, #40]
@@ -166,6 +167,7 @@ define void @bzero_64_stack() {
ret void
}
+; FIXME These don't pair up because the offset isn't a multiple of 16 bits. x0, however, could be used as a base for a paired store.
define void @bzero_72_stack() {
; CHECK-LABEL: bzero_72_stack:
; CHECK: stp xzr, x30, [sp, #72]
@@ -218,6 +220,214 @@ define void @bzero_256_stack() {
call void @something(i8* %cast)
ret void
}
+
+define void @memset_4_stack() {
+; CHECK-LABEL: memset_4_stack:
+; CHECK: mov w8, #-1431655766
+; CHECK-NEXT: add x0, sp, #12
+; CHECK-NEXT: str w8, [sp, #12]
+; CHECK-NEXT: bl something
+ %buf = alloca [4 x i8], align 1
+ %cast = bitcast [4 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 4, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
+
+define void @memset_8_stack() {
+; CHECK-LABEL: memset_8_stack:
+; CHECK: mov x8, #-6148914691236517206
+; CHECK-NEXT: add x0, sp, #8
+; CHECK-NEXT: str x8, [sp, #8]
+; CHECK-NEXT: bl something
+ %buf = alloca [8 x i8], align 1
+ %cast = bitcast [8 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 8, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
+
+; FIXME This could be better: x9 is a superset of w8's bit-pattern.
+define void @memset_12_stack() {
+; CHECK-LABEL: memset_12_stack:
+; CHECK: mov w8, #-1431655766
+; CHECK-NEXT: mov x9, #-6148914691236517206
+; CHECK-NEXT: mov x0, sp
+; CHECK-NEXT: str w8, [sp, #8]
+; CHECK-NEXT: str x9, [sp]
+; CHECK-NEXT: bl something
+ %buf = alloca [12 x i8], align 1
+ %cast = bitcast [12 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 12, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
+
+define void @memset_16_stack() {
+; CHECK-LABEL: memset_16_stack:
+; CHECK: mov x8, #-6148914691236517206
+; CHECK-NEXT: mov x0, sp
+; CHECK-NEXT: stp x8, x30, [sp, #8]
+; CHECK-NEXT: str x8, [sp]
+; CHECK-NEXT: bl something
+ %buf = alloca [16 x i8], align 1
+ %cast = bitcast [16 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 16, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
+
+; FIXME This could be better: x9 is a superset of w8's bit-pattern.
+define void @memset_20_stack() {
+; CHECK-LABEL: memset_20_stack:
+; CHECK: mov w8, #-1431655766
+; CHECK-NEXT: mov x9, #-6148914691236517206
+; CHECK-NEXT: add x0, sp, #8
+; CHECK-NEXT: str w8, [sp, #24]
+; CHECK-NEXT: stp x9, x9, [sp, #8]
+; CHECK-NEXT: bl something
+ %buf = alloca [20 x i8], align 1
+ %cast = bitcast [20 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 20, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
+
+; FIXME This could be better: x9 is a superset of w8's bit-pattern.
+define void @memset_26_stack() {
+; CHECK-LABEL: memset_26_stack:
+; CHECK: mov w8, #43690
+; CHECK-NEXT: mov x9, #-6148914691236517206
+; CHECK-NEXT: mov x0, sp
+; CHECK-NEXT: strh w8, [sp, #24]
+; CHECK-NEXT: stp x9, x9, [sp, #8]
+; CHECK-NEXT: str x9, [sp]
+; CHECK-NEXT: bl something
+ %buf = alloca [26 x i8], align 1
+ %cast = bitcast [26 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 26, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
+
+; FIXME This could use FP ops.
+define void @memset_32_stack() {
+; CHECK-LABEL: memset_32_stack:
+; CHECK: mov x8, #-6148914691236517206
+; CHECK-NEXT: mov x0, sp
+; CHECK-NEXT: stp x8, x30, [sp, #24]
+; CHECK-NEXT: stp x8, x8, [sp, #8]
+; CHECK-NEXT: str x8, [sp]
+; CHECK-NEXT: bl something
+ %buf = alloca [32 x i8], align 1
+ %cast = bitcast [32 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 32, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
+
+; FIXME This could use FP ops.
+define void @memset_40_stack() {
+; CHECK-LABEL: memset_40_stack:
+; CHECK: mov x8, #-6148914691236517206
+; CHECK-NEXT: add x0, sp, #8
+; CHECK-NEXT: stp x8, x30, [sp, #40]
+; CHECK-NEXT: stp x8, x8, [sp, #24]
+; CHECK-NEXT: stp x8, x8, [sp, #8]
+; CHECK-NEXT: bl something
+ %buf = alloca [40 x i8], align 1
+ %cast = bitcast [40 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 40, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
+
+; FIXME This could use FP ops.
+define void @memset_64_stack() {
+; CHECK-LABEL: memset_64_stack:
+; CHECK: mov x8, #-6148914691236517206
+; CHECK-NEXT: mov x0, sp
+; CHECK-NEXT: stp x8, x30, [sp, #56]
+; CHECK-NEXT: stp x8, x8, [sp, #40]
+; CHECK-NEXT: stp x8, x8, [sp, #24]
+; CHECK-NEXT: stp x8, x8, [sp, #8]
+; CHECK-NEXT: str x8, [sp]
+; CHECK-NEXT: bl something
+ %buf = alloca [64 x i8], align 1
+ %cast = bitcast [64 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 64, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
+
+; FIXME This could use FP ops.
+define void @memset_72_stack() {
+; CHECK-LABEL: memset_72_stack:
+; CHECK: mov x8, #-6148914691236517206
+; CHECK-NEXT: add x0, sp, #8
+; CHECK-NEXT: stp x8, x30, [sp, #72]
+; CHECK-NEXT: stp x8, x8, [sp, #56]
+; CHECK-NEXT: stp x8, x8, [sp, #40]
+; CHECK-NEXT: stp x8, x8, [sp, #24]
+; CHECK-NEXT: stp x8, x8, [sp, #8]
+; CHECK-NEXT: bl something
+ %buf = alloca [72 x i8], align 1
+ %cast = bitcast [72 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 72, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
+
+; FIXME This could use FP ops.
+define void @memset_128_stack() {
+; CHECK-LABEL: memset_128_stack:
+; CHECK: mov x8, #-6148914691236517206
+; CHECK-NEXT: mov x0, sp
+; CHECK-NEXT: stp x8, x30, [sp, #120]
+; CHECK-NEXT: stp x8, x8, [sp, #104]
+; CHECK-NEXT: stp x8, x8, [sp, #88]
+; CHECK-NEXT: stp x8, x8, [sp, #72]
+; CHECK-NEXT: stp x8, x8, [sp, #56]
+; CHECK-NEXT: stp x8, x8, [sp, #40]
+; CHECK-NEXT: stp x8, x8, [sp, #24]
+; CHECK-NEXT: stp x8, x8, [sp, #8]
+; CHECK-NEXT: str x8, [sp]
+; CHECK-NEXT: bl something
+ %buf = alloca [128 x i8], align 1
+ %cast = bitcast [128 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 128, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
+
+; FIXME This could use FP ops.
+define void @memset_256_stack() {
+; CHECK-LABEL: memset_256_stack:
+; CHECK: mov x8, #-6148914691236517206
+; CHECK-NEXT: mov x0, sp
+; CHECK-NEXT: stp x8, x8, [sp, #240]
+; CHECK-NEXT: stp x8, x8, [sp, #224]
+; CHECK-NEXT: stp x8, x8, [sp, #208]
+; CHECK-NEXT: stp x8, x8, [sp, #192]
+; CHECK-NEXT: stp x8, x8, [sp, #176]
+; CHECK-NEXT: stp x8, x8, [sp, #160]
+; CHECK-NEXT: stp x8, x8, [sp, #144]
+; CHECK-NEXT: stp x8, x8, [sp, #128]
+; CHECK-NEXT: stp x8, x8, [sp, #112]
+; CHECK-NEXT: stp x8, x8, [sp, #96]
+; CHECK-NEXT: stp x8, x8, [sp, #80]
+; CHECK-NEXT: stp x8, x8, [sp, #64]
+; CHECK-NEXT: stp x8, x8, [sp, #48]
+; CHECK-NEXT: stp x8, x8, [sp, #32]
+; CHECK-NEXT: stp x8, x8, [sp, #16]
+; CHECK-NEXT: stp x8, x8, [sp]
+; CHECK-NEXT: bl something
+ %buf = alloca [256 x i8], align 1
+ %cast = bitcast [256 x i8]* %buf to i8*
+ call void @llvm.memset.p0i8.i32(i8* %cast, i8 -86, i32 256, i1 false)
+ call void @something(i8* %cast)
+ ret void
+}
declare void @something(i8*)
declare void @llvm.memset.p0i8.i32(i8* nocapture, i8, i32, i1) nounwind
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