[PATCH] D51656: [WebAssembly][NFC] Fix formatting and tests

[Thomas Lively via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rL341411: [WebAssembly][NFC] Fix formatting and tests (authored by tlively, committed by ).

Repository:
  rL LLVM

https://reviews.llvm.org/D51656

Files:
  llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
  llvm/trunk/test/CodeGen/WebAssembly/simd.ll


Index: llvm/trunk/test/CodeGen/WebAssembly/simd.ll
===================================================================
--- llvm/trunk/test/CodeGen/WebAssembly/simd.ll
+++ llvm/trunk/test/CodeGen/WebAssembly/simd.ll
@@ -37,7 +37,7 @@
   ret <16 x i8> %res
 }
 
-; CHECK-LABEL: const_splat_v16i8
+; CHECK-LABEL: const_splat_v16i8:
 ; SIMD128; i8x16.splat
 define <16 x i8> @const_splat_v16i8() {
   ret <16 x i8> <i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42, i8 42,
@@ -267,7 +267,7 @@
   ret <4 x i32> %res
 }
 
-; CHECK-LABEL: const_splat_v4i32
+; CHECK-LABEL: const_splat_v4i32:
 ; SIMD128; i32x4.splat
 define <4 x i32> @const_splat_v4i32() {
   ret <4 x i32> <i32 42, i32 42, i32 42, i32 42>
@@ -340,6 +340,12 @@
   ret <2 x i64> %res
 }
 
+; CHECK-LABEL: const_splat_v2i64:
+; SIMD128; i64x2.splat
+define <2 x i64> @const_splat_v2i64() {
+  ret <2 x i64> <i64 42, i64 42>
+}
+
 ; CHECK-LABEL: extract_v2i64:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-VM-NOT: i64x2
@@ -364,10 +370,6 @@
   ret <2 x i64> %res
 }
 
-define <2 x i64> @const_splat_v2i64() {
-  ret <2 x i64> <i64 42, i64 42>
-}
-
 ; CHECK-LABEL: build_v2i64:
 ; NO-SIMD128-NOT: i64x2
 ; SIMD128-VM-NOT: i64x2
Index: llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
===================================================================
--- llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
+++ llvm/trunk/lib/Target/WebAssembly/WebAssemblyInstrSIMD.td
@@ -71,7 +71,7 @@
 defm extract_i8x16 : ExtractPat<i8, 0xff>;
 defm extract_i16x8 : ExtractPat<i16, 0xffff>;
 multiclass ExtractLaneExtended<string sign, bits<32> baseInst> {
-  defm "" : ExtractLane<v16i8, "i8x16", LaneIdx16, I32,  baseInst, sign,
+  defm "" : ExtractLane<v16i8, "i8x16", LaneIdx16, I32, baseInst, sign,
                         !cast<PatFrag>("extract_i8x16"#sign)>;
   defm "" : ExtractLane<v8i16, "i16x8", LaneIdx8, I32, !add(baseInst, 2), sign,
                         !cast<PatFrag>("extract_i16x8"#sign)>;


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