[llvm] r341393 - AMDGPU: Fix DAG divergence not reporting flat loads

Matt Arsenault via llvm-commits llvm-commits at lists.llvm.org
Tue Sep 4 11:58:19 PDT 2018


Author: arsenm
Date: Tue Sep  4 11:58:19 2018
New Revision: 341393

URL: http://llvm.org/viewvc/llvm-project?rev=341393&view=rev
Log:
AMDGPU: Fix DAG divergence not reporting flat loads

Match behavior in DAG of r340343

Added:
    llvm/trunk/test/CodeGen/AMDGPU/dag-divergence.ll
Modified:
    llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp

Modified: llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp?rev=341393&r1=341392&r2=341393&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp Tue Sep  4 11:58:19 2018
@@ -9206,10 +9206,10 @@ bool SITargetLowering::isSDNodeSourceOfD
     }
     break;
     case ISD::LOAD: {
-      const LoadSDNode *L = dyn_cast<LoadSDNode>(N);
-      // FIXME: Also needs to handle flat.
-      if (L->getMemOperand()->getAddrSpace() == AMDGPUAS::PRIVATE_ADDRESS)
-        return true;
+      const LoadSDNode *L = cast<LoadSDNode>(N);
+      unsigned AS = L->getAddressSpace();
+      // A flat load may access private memory.
+      return AS == AMDGPUAS::PRIVATE_ADDRESS || AS == AMDGPUAS::FLAT_ADDRESS;
     } break;
     case ISD::CALLSEQ_END:
     return true;

Added: llvm/trunk/test/CodeGen/AMDGPU/dag-divergence.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/dag-divergence.ll?rev=341393&view=auto
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/dag-divergence.ll (added)
+++ llvm/trunk/test/CodeGen/AMDGPU/dag-divergence.ll Tue Sep  4 11:58:19 2018
@@ -0,0 +1,30 @@
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck -check-prefix=GCN %s
+
+; GCN-LABEL: {{^}}private_load_maybe_divergent:
+; GCN: buffer_load_dword
+; GCN-NOT: s_load_dword s
+; GCN: flat_load_dword
+; GCN-NOT: s_load_dword s
+define amdgpu_kernel void @private_load_maybe_divergent(i32 addrspace(4)* %k, i32* %flat) {
+  %load = load volatile i32, i32 addrspace(5)* undef, align 4
+  %gep = getelementptr inbounds i32, i32 addrspace(4)* %k, i32 %load
+  %maybe.not.uniform.load = load i32, i32 addrspace(4)* %gep, align 4
+  store i32 %maybe.not.uniform.load, i32 addrspace(1)* undef
+  ret void
+}
+
+; GCN-LABEL: {{^}}flat_load_maybe_divergent:
+; GCN: s_load_dwordx4
+; GCN-NOT: s_load
+; GCN: flat_load_dword
+; GCN-NOT: s_load
+; GCN: flat_load_dword
+; GCN-NOT: s_load
+; GCN: flat_store_dword
+define amdgpu_kernel void @flat_load_maybe_divergent(i32 addrspace(4)* %k, i32* %flat) {
+  %load = load i32, i32* %flat, align 4
+  %gep = getelementptr inbounds i32, i32 addrspace(4)* %k, i32 %load
+  %maybe.not.uniform.load = load i32, i32 addrspace(4)* %gep, align 4
+  store i32 %maybe.not.uniform.load, i32 addrspace(1)* undef
+  ret void
+}




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