[www-pubs] r341295 - Added publications for AHIR, an LLVM-based toolchain for high-level synthesis

[Sameer Sahasrabuddhe via llvm-commits]

Author: sameerds
Date: Sun Sep  2 23:46:54 2018
New Revision: 341295

URL: http://llvm.org/viewvc/llvm-project?rev=341295&view=rev
Log:
Added publications for AHIR, an LLVM-based toolchain for high-level synthesis

AHIR: A Hardware Intermediate Represenation
AHIR is an IR and a toolchain that can can convert LLVM IR into syntheisable VHDL or Verilog.


Modified:
    www-pubs/trunk/pubs.js

Modified: www-pubs/trunk/pubs.js
URL: http://llvm.org/viewvc/llvm-project/www-pubs/trunk/pubs.js?rev=341295&r1=341294&r2=341295&view=diff
==============================================================================
--- www-pubs/trunk/pubs.js (original)
+++ www-pubs/trunk/pubs.js Sun Sep  2 23:46:54 2018
@@ -692,6 +692,15 @@ var PUBS =
     year: 2012,
   },
 
+  { url: "https://dl.acm.org/citation.cfm?id=2342821.2342828",
+    author: "Teemu Rinta-Aho, Mika Karlstedt, and Madhav P. Desai",
+    title: "The Click2NetFPGA toolchain",
+    published: "Proceedings of the 2012 USENIX Annual Technical Conference",
+    month: 6,
+    year: 2012,
+    location: "Boston, MA",
+  },
+
   { url: "http://ieeexplore.ieee.org/stamp/stamp.jsp?tp=&arnumber=6270679&isnumber=6270391",
     author: "Stripf, T.; Koenig, R.; Rieder, P.; Becker, J.;",
     title: "A Compiler Back-End for Reconfigurable, Mixed-ISA Processors with Clustered Register Files",
@@ -930,6 +939,24 @@ location: "Vancouver, BC, Canada",
    month: 9,
    year: 2010},
   {
+      url: "https://doi.org/10.1109/DSD.2010.52",
+      title: "A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems",
+      published: "13th Euromicro Conference on Digital System Design: Architectures, Methods and Tools",
+      author: "Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Kunal P. Ghosh, Kavi Arya, and Madhav P. Desai",
+      location: "Lille, France",
+      month: 9,
+      year: 2010
+  },
+  {
+      url: "http://www.rinta-aho.org/papers/NetFPGA2010-Cmb-nikander.pdf",
+      title: "Towards Software-defined Silicon: Experiences in Compiling Click to NetFPGA",
+      published: "1st European NetFPGA Developers Workshop",
+      author: "James Kempf, Pekka Nikander, Sameer D. Sahasrabuddhe, Teemu Rinta-aho, and Benny Nyman",
+      location: "University of Cambridge, UK",
+      month: 9,
+      year: 2010
+  },
+  {
             url: "2010-07-CAV-LazyAnnot.html",
             title: "Lazy Annotation for Program Testing and Verification",
             published: "Proceedings of Computer Aided Verification (CAV 2010)",