[llvm] r341287 - [DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 2 06:56:23 PDT 2018
Author: lebedevri
Date: Sun Sep 2 06:56:22 2018
New Revision: 341287
URL: http://llvm.org/viewvc/llvm-project?rev=341287&view=rev
Log:
[DAGCombine] optimizeSetCCOfSignedTruncationCheck(): handle inverted pattern
Summary:
A follow-up for D49266 / rL337166 + D49497 / rL338044.
This is still the same pattern to check for the [lack of]
signed truncation, but in this case the constants and the predicate
are negated.
https://rise4fun.com/Alive/BDV
https://rise4fun.com/Alive/n7Z
Reviewers: spatel, craig.topper, RKSimon, javed.absar, efriedma, dmgreen
Reviewed By: spatel
Subscribers: llvm-commits
Differential Revision: https://reviews.llvm.org/D51532
Modified:
llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
llvm/trunk/test/CodeGen/AArch64/lack-of-signed-truncation-check.ll
llvm/trunk/test/CodeGen/AArch64/signed-truncation-check.ll
llvm/trunk/test/CodeGen/X86/lack-of-signed-truncation-check.ll
llvm/trunk/test/CodeGen/X86/signed-truncation-check.ll
Modified: llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp?rev=341287&r1=341286&r2=341287&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp (original)
+++ llvm/trunk/lib/CodeGen/SelectionDAG/TargetLowering.cpp Sun Sep 2 06:56:22 2018
@@ -1914,10 +1914,24 @@ SDValue TargetLowering::optimizeSetCCOfS
} else
return SDValue();
- const APInt &I01 = C01->getAPIntValue();
- // Both of them must be power-of-two, and the constant from setcc is bigger.
- if (!(I1.ugt(I01) && I1.isPowerOf2() && I01.isPowerOf2()))
- return SDValue();
+ APInt I01 = C01->getAPIntValue();
+
+ auto checkConstants = [&I1, &I01]() -> bool {
+ // Both of them must be power-of-two, and the constant from setcc is bigger.
+ return I1.ugt(I01) && I1.isPowerOf2() && I01.isPowerOf2();
+ };
+
+ if (checkConstants()) {
+ // Great, e.g. got icmp ult i16 (add i16 %x, 128), 256
+ } else {
+ // What if we invert constants? (and the target predicate)
+ I1.negate();
+ I01.negate();
+ NewCond = getSetCCInverse(NewCond, /*isInteger=*/true);
+ if (!checkConstants())
+ return SDValue();
+ // Great, e.g. got icmp uge i16 (add i16 %x, -128), -256
+ }
// They are power-of-two, so which bit is set?
const unsigned KeptBits = I1.logBase2();
Modified: llvm/trunk/test/CodeGen/AArch64/lack-of-signed-truncation-check.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/lack-of-signed-truncation-check.ll?rev=341287&r1=341286&r2=341287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/lack-of-signed-truncation-check.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/lack-of-signed-truncation-check.ll Sun Sep 2 06:56:22 2018
@@ -104,10 +104,10 @@ define i1 @shifts_necmp_i64_i8(i64 %x) n
define i1 @add_ultcmp_i16_i8(i16 %x) nounwind {
; CHECK-LABEL: add_ultcmp_i16_i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub w8, w0, #128 // =128
-; CHECK-NEXT: ubfx w8, w8, #8, #8
-; CHECK-NEXT: cmp w8, #255 // =255
-; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: sxtb w8, w0
+; CHECK-NEXT: and w8, w8, #0xffff
+; CHECK-NEXT: cmp w8, w0, uxth
+; CHECK-NEXT: cset w0, ne
; CHECK-NEXT: ret
%tmp0 = add i16 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp ult i16 %tmp0, -256 ; ~0U << 8
@@ -117,9 +117,9 @@ define i1 @add_ultcmp_i16_i8(i16 %x) nou
define i1 @add_ultcmp_i32_i16(i32 %x) nounwind {
; CHECK-LABEL: add_ultcmp_i32_i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub w8, w0, #8, lsl #12 // =32768
-; CHECK-NEXT: cmn w8, #16, lsl #12 // =65536
-; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: sxth w8, w0
+; CHECK-NEXT: cmp w8, w0
+; CHECK-NEXT: cset w0, ne
; CHECK-NEXT: ret
%tmp0 = add i32 %x, -32768 ; ~0U << (16-1)
%tmp1 = icmp ult i32 %tmp0, -65536 ; ~0U << 16
@@ -129,9 +129,9 @@ define i1 @add_ultcmp_i32_i16(i32 %x) no
define i1 @add_ultcmp_i32_i8(i32 %x) nounwind {
; CHECK-LABEL: add_ultcmp_i32_i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub w8, w0, #128 // =128
-; CHECK-NEXT: cmn w8, #256 // =256
-; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: sxtb w8, w0
+; CHECK-NEXT: cmp w8, w0
+; CHECK-NEXT: cset w0, ne
; CHECK-NEXT: ret
%tmp0 = add i32 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp ult i32 %tmp0, -256 ; ~0U << 8
@@ -141,11 +141,9 @@ define i1 @add_ultcmp_i32_i8(i32 %x) nou
define i1 @add_ultcmp_i64_i32(i64 %x) nounwind {
; CHECK-LABEL: add_ultcmp_i64_i32:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov x8, #-2147483648
-; CHECK-NEXT: add x8, x0, x8
-; CHECK-NEXT: mov x9, #-4294967296
-; CHECK-NEXT: cmp x8, x9
-; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: sxtw x8, w0
+; CHECK-NEXT: cmp x8, x0
+; CHECK-NEXT: cset w0, ne
; CHECK-NEXT: ret
%tmp0 = add i64 %x, -2147483648 ; ~0U << (32-1)
%tmp1 = icmp ult i64 %tmp0, -4294967296 ; ~0U << 32
@@ -155,9 +153,9 @@ define i1 @add_ultcmp_i64_i32(i64 %x) no
define i1 @add_ultcmp_i64_i16(i64 %x) nounwind {
; CHECK-LABEL: add_ultcmp_i64_i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub x8, x0, #8, lsl #12 // =32768
-; CHECK-NEXT: cmn x8, #16, lsl #12 // =65536
-; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: sxth x8, w0
+; CHECK-NEXT: cmp x8, x0
+; CHECK-NEXT: cset w0, ne
; CHECK-NEXT: ret
%tmp0 = add i64 %x, -32768 ; ~0U << (16-1)
%tmp1 = icmp ult i64 %tmp0, -65536 ; ~0U << 16
@@ -167,9 +165,9 @@ define i1 @add_ultcmp_i64_i16(i64 %x) no
define i1 @add_ultcmp_i64_i8(i64 %x) nounwind {
; CHECK-LABEL: add_ultcmp_i64_i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub x8, x0, #128 // =128
-; CHECK-NEXT: cmn x8, #256 // =256
-; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: sxtb x8, w0
+; CHECK-NEXT: cmp x8, x0
+; CHECK-NEXT: cset w0, ne
; CHECK-NEXT: ret
%tmp0 = add i64 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp ult i64 %tmp0, -256 ; ~0U << 8
@@ -180,10 +178,10 @@ define i1 @add_ultcmp_i64_i8(i64 %x) nou
define i1 @add_ulecmp_i16_i8(i16 %x) nounwind {
; CHECK-LABEL: add_ulecmp_i16_i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub w8, w0, #128 // =128
-; CHECK-NEXT: ubfx w8, w8, #8, #8
-; CHECK-NEXT: cmp w8, #255 // =255
-; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: sxtb w8, w0
+; CHECK-NEXT: and w8, w8, #0xffff
+; CHECK-NEXT: cmp w8, w0, uxth
+; CHECK-NEXT: cset w0, ne
; CHECK-NEXT: ret
%tmp0 = add i16 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp ule i16 %tmp0, -257 ; ~0U << 8 - 1
Modified: llvm/trunk/test/CodeGen/AArch64/signed-truncation-check.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AArch64/signed-truncation-check.ll?rev=341287&r1=341286&r2=341287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AArch64/signed-truncation-check.ll (original)
+++ llvm/trunk/test/CodeGen/AArch64/signed-truncation-check.ll Sun Sep 2 06:56:22 2018
@@ -104,10 +104,10 @@ define i1 @shifts_eqcmp_i64_i8(i64 %x) n
define i1 @add_ugecmp_i16_i8(i16 %x) nounwind {
; CHECK-LABEL: add_ugecmp_i16_i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub w8, w0, #128 // =128
-; CHECK-NEXT: ubfx w8, w8, #8, #8
-; CHECK-NEXT: cmp w8, #254 // =254
-; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: sxtb w8, w0
+; CHECK-NEXT: and w8, w8, #0xffff
+; CHECK-NEXT: cmp w8, w0, uxth
+; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
%tmp0 = add i16 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp uge i16 %tmp0, -256 ; ~0U << 8
@@ -117,10 +117,9 @@ define i1 @add_ugecmp_i16_i8(i16 %x) nou
define i1 @add_ugecmp_i32_i16(i32 %x) nounwind {
; CHECK-LABEL: add_ugecmp_i32_i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub w8, w0, #8, lsl #12 // =32768
-; CHECK-NEXT: orr w9, wzr, #0xfffeffff
-; CHECK-NEXT: cmp w8, w9
-; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: sxth w8, w0
+; CHECK-NEXT: cmp w8, w0
+; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
%tmp0 = add i32 %x, -32768 ; ~0U << (16-1)
%tmp1 = icmp uge i32 %tmp0, -65536 ; ~0U << 16
@@ -130,9 +129,9 @@ define i1 @add_ugecmp_i32_i16(i32 %x) no
define i1 @add_ugecmp_i32_i8(i32 %x) nounwind {
; CHECK-LABEL: add_ugecmp_i32_i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub w8, w0, #128 // =128
-; CHECK-NEXT: cmn w8, #257 // =257
-; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: sxtb w8, w0
+; CHECK-NEXT: cmp w8, w0
+; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
%tmp0 = add i32 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp uge i32 %tmp0, -256 ; ~0U << 8
@@ -142,11 +141,9 @@ define i1 @add_ugecmp_i32_i8(i32 %x) nou
define i1 @add_ugecmp_i64_i32(i64 %x) nounwind {
; CHECK-LABEL: add_ugecmp_i64_i32:
; CHECK: // %bb.0:
-; CHECK-NEXT: mov x8, #-2147483648
-; CHECK-NEXT: add x8, x0, x8
-; CHECK-NEXT: orr x9, xzr, #0xfffffffeffffffff
-; CHECK-NEXT: cmp x8, x9
-; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: sxtw x8, w0
+; CHECK-NEXT: cmp x8, x0
+; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
%tmp0 = add i64 %x, -2147483648 ; ~0U << (32-1)
%tmp1 = icmp uge i64 %tmp0, -4294967296 ; ~0U << 32
@@ -156,10 +153,9 @@ define i1 @add_ugecmp_i64_i32(i64 %x) no
define i1 @add_ugecmp_i64_i16(i64 %x) nounwind {
; CHECK-LABEL: add_ugecmp_i64_i16:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub x8, x0, #8, lsl #12 // =32768
-; CHECK-NEXT: orr x9, xzr, #0xfffffffffffeffff
-; CHECK-NEXT: cmp x8, x9
-; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: sxth x8, w0
+; CHECK-NEXT: cmp x8, x0
+; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
%tmp0 = add i64 %x, -32768 ; ~0U << (16-1)
%tmp1 = icmp uge i64 %tmp0, -65536 ; ~0U << 16
@@ -169,9 +165,9 @@ define i1 @add_ugecmp_i64_i16(i64 %x) no
define i1 @add_ugecmp_i64_i8(i64 %x) nounwind {
; CHECK-LABEL: add_ugecmp_i64_i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub x8, x0, #128 // =128
-; CHECK-NEXT: cmn x8, #257 // =257
-; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: sxtb x8, w0
+; CHECK-NEXT: cmp x8, x0
+; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
%tmp0 = add i64 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp uge i64 %tmp0, -256 ; ~0U << 8
@@ -182,10 +178,10 @@ define i1 @add_ugecmp_i64_i8(i64 %x) nou
define i1 @add_ugtcmp_i16_i8(i16 %x) nounwind {
; CHECK-LABEL: add_ugtcmp_i16_i8:
; CHECK: // %bb.0:
-; CHECK-NEXT: sub w8, w0, #128 // =128
-; CHECK-NEXT: ubfx w8, w8, #8, #8
-; CHECK-NEXT: cmp w8, #254 // =254
-; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: sxtb w8, w0
+; CHECK-NEXT: and w8, w8, #0xffff
+; CHECK-NEXT: cmp w8, w0, uxth
+; CHECK-NEXT: cset w0, eq
; CHECK-NEXT: ret
%tmp0 = add i16 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp ugt i16 %tmp0, -257 ; ~0U << 8 - 1
Modified: llvm/trunk/test/CodeGen/X86/lack-of-signed-truncation-check.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/lack-of-signed-truncation-check.ll?rev=341287&r1=341286&r2=341287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/lack-of-signed-truncation-check.ll (original)
+++ llvm/trunk/test/CodeGen/X86/lack-of-signed-truncation-check.ll Sun Sep 2 06:56:22 2018
@@ -160,19 +160,17 @@ define i1 @shifts_necmp_i64_i8(i64 %x) n
define i1 @add_ultcmp_i16_i8(i16 %x) nounwind {
; X86-LABEL: add_ultcmp_i16_i8:
; X86: # %bb.0:
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: addl $-128, %eax
-; X86-NEXT: movzwl %ax, %eax
-; X86-NEXT: cmpl $65280, %eax # imm = 0xFF00
-; X86-NEXT: setb %al
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: cmpw %ax, %cx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ultcmp_i16_i8:
; X64: # %bb.0:
-; X64-NEXT: addl $-128, %edi
-; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: cmpl $65280, %eax # imm = 0xFF00
-; X64-NEXT: setb %al
+; X64-NEXT: movsbl %dil, %eax
+; X64-NEXT: cmpw %di, %ax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i16 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp ult i16 %tmp0, -256 ; ~0U << 8
@@ -182,17 +180,17 @@ define i1 @add_ultcmp_i16_i8(i16 %x) nou
define i1 @add_ultcmp_i32_i16(i32 %x) nounwind {
; X86-LABEL: add_ultcmp_i32_i16:
; X86: # %bb.0:
-; X86-NEXT: movl $-32768, %eax # imm = 0x8000
-; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $-65536, %eax # imm = 0xFFFF0000
-; X86-NEXT: setb %al
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movswl %ax, %ecx
+; X86-NEXT: cmpl %eax, %ecx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ultcmp_i32_i16:
; X64: # %bb.0:
-; X64-NEXT: addl $-32768, %edi # imm = 0x8000
-; X64-NEXT: cmpl $-65536, %edi # imm = 0xFFFF0000
-; X64-NEXT: setb %al
+; X64-NEXT: movswl %di, %eax
+; X64-NEXT: cmpl %edi, %eax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i32 %x, -32768 ; ~0U << (16-1)
%tmp1 = icmp ult i32 %tmp0, -65536 ; ~0U << 16
@@ -203,16 +201,16 @@ define i1 @add_ultcmp_i32_i8(i32 %x) nou
; X86-LABEL: add_ultcmp_i32_i8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: addl $-128, %eax
-; X86-NEXT: cmpl $-256, %eax
-; X86-NEXT: setb %al
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: cmpl %eax, %ecx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ultcmp_i32_i8:
; X64: # %bb.0:
-; X64-NEXT: addl $-128, %edi
-; X64-NEXT: cmpl $-256, %edi
-; X64-NEXT: setb %al
+; X64-NEXT: movsbl %dil, %eax
+; X64-NEXT: cmpl %edi, %eax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i32 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp ult i32 %tmp0, -256 ; ~0U << 8
@@ -223,19 +221,16 @@ define i1 @add_ultcmp_i64_i32(i64 %x) no
; X86-LABEL: add_ultcmp_i64_i32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
-; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: adcl $-1, %eax
-; X86-NEXT: cmpl $-1, %eax
+; X86-NEXT: sarl $31, %eax
+; X86-NEXT: xorl {{[0-9]+}}(%esp), %eax
; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ultcmp_i64_i32:
; X64: # %bb.0:
-; X64-NEXT: addq $-2147483648, %rdi # imm = 0x80000000
-; X64-NEXT: movabsq $-4294967296, %rax # imm = 0xFFFFFFFF00000000
-; X64-NEXT: cmpq %rax, %rdi
-; X64-NEXT: setb %al
+; X64-NEXT: movslq %edi, %rax
+; X64-NEXT: cmpq %rdi, %rax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i64 %x, -2147483648 ; ~0U << (32-1)
%tmp1 = icmp ult i64 %tmp0, -4294967296 ; ~0U << 32
@@ -246,19 +241,19 @@ define i1 @add_ultcmp_i64_i16(i64 %x) no
; X86-LABEL: add_ultcmp_i64_i16:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl $-32768, %ecx # imm = 0x8000
-; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: adcl $-1, %eax
-; X86-NEXT: cmpl $-65536, %ecx # imm = 0xFFFF0000
-; X86-NEXT: sbbl $-1, %eax
-; X86-NEXT: setb %al
+; X86-NEXT: movswl %ax, %ecx
+; X86-NEXT: xorl %ecx, %eax
+; X86-NEXT: sarl $31, %ecx
+; X86-NEXT: xorl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: orl %eax, %ecx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ultcmp_i64_i16:
; X64: # %bb.0:
-; X64-NEXT: addq $-32768, %rdi # imm = 0x8000
-; X64-NEXT: cmpq $-65536, %rdi # imm = 0xFFFF0000
-; X64-NEXT: setb %al
+; X64-NEXT: movswq %di, %rax
+; X64-NEXT: cmpq %rdi, %rax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i64 %x, -32768 ; ~0U << (16-1)
%tmp1 = icmp ult i64 %tmp0, -65536 ; ~0U << 16
@@ -269,19 +264,19 @@ define i1 @add_ultcmp_i64_i8(i64 %x) nou
; X86-LABEL: add_ultcmp_i64_i8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: addl $-128, %eax
-; X86-NEXT: adcl $-1, %ecx
-; X86-NEXT: cmpl $-256, %eax
-; X86-NEXT: sbbl $-1, %ecx
-; X86-NEXT: setb %al
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: xorl %ecx, %eax
+; X86-NEXT: sarl $31, %ecx
+; X86-NEXT: xorl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: orl %eax, %ecx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ultcmp_i64_i8:
; X64: # %bb.0:
-; X64-NEXT: addq $-128, %rdi
-; X64-NEXT: cmpq $-256, %rdi
-; X64-NEXT: setb %al
+; X64-NEXT: movsbq %dil, %rax
+; X64-NEXT: cmpq %rdi, %rax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i64 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp ult i64 %tmp0, -256 ; ~0U << 8
@@ -292,19 +287,17 @@ define i1 @add_ultcmp_i64_i8(i64 %x) nou
define i1 @add_ulecmp_i16_i8(i16 %x) nounwind {
; X86-LABEL: add_ulecmp_i16_i8:
; X86: # %bb.0:
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: addl $-128, %eax
-; X86-NEXT: movzwl %ax, %eax
-; X86-NEXT: cmpl $65280, %eax # imm = 0xFF00
-; X86-NEXT: setb %al
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: cmpw %ax, %cx
+; X86-NEXT: setne %al
; X86-NEXT: retl
;
; X64-LABEL: add_ulecmp_i16_i8:
; X64: # %bb.0:
-; X64-NEXT: addl $-128, %edi
-; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: cmpl $65280, %eax # imm = 0xFF00
-; X64-NEXT: setb %al
+; X64-NEXT: movsbl %dil, %eax
+; X64-NEXT: cmpw %di, %ax
+; X64-NEXT: setne %al
; X64-NEXT: retq
%tmp0 = add i16 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp ule i16 %tmp0, -257 ; ~0U << 8 - 1
Modified: llvm/trunk/test/CodeGen/X86/signed-truncation-check.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/signed-truncation-check.ll?rev=341287&r1=341286&r2=341287&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/signed-truncation-check.ll (original)
+++ llvm/trunk/test/CodeGen/X86/signed-truncation-check.ll Sun Sep 2 06:56:22 2018
@@ -160,19 +160,17 @@ define i1 @shifts_eqcmp_i64_i8(i64 %x) n
define i1 @add_ugecmp_i16_i8(i16 %x) nounwind {
; X86-LABEL: add_ugecmp_i16_i8:
; X86: # %bb.0:
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: addl $-128, %eax
-; X86-NEXT: movzwl %ax, %eax
-; X86-NEXT: cmpl $65279, %eax # imm = 0xFEFF
-; X86-NEXT: seta %al
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: cmpw %ax, %cx
+; X86-NEXT: sete %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i16_i8:
; X64: # %bb.0:
-; X64-NEXT: addl $-128, %edi
-; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: cmpl $65279, %eax # imm = 0xFEFF
-; X64-NEXT: seta %al
+; X64-NEXT: movsbl %dil, %eax
+; X64-NEXT: cmpw %di, %ax
+; X64-NEXT: sete %al
; X64-NEXT: retq
%tmp0 = add i16 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp uge i16 %tmp0, -256 ; ~0U << 8
@@ -182,17 +180,17 @@ define i1 @add_ugecmp_i16_i8(i16 %x) nou
define i1 @add_ugecmp_i32_i16(i32 %x) nounwind {
; X86-LABEL: add_ugecmp_i32_i16:
; X86: # %bb.0:
-; X86-NEXT: movl $-32768, %eax # imm = 0x8000
-; X86-NEXT: addl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: cmpl $-65537, %eax # imm = 0xFFFEFFFF
-; X86-NEXT: seta %al
+; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movswl %ax, %ecx
+; X86-NEXT: cmpl %eax, %ecx
+; X86-NEXT: sete %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i32_i16:
; X64: # %bb.0:
-; X64-NEXT: addl $-32768, %edi # imm = 0x8000
-; X64-NEXT: cmpl $-65537, %edi # imm = 0xFFFEFFFF
-; X64-NEXT: seta %al
+; X64-NEXT: movswl %di, %eax
+; X64-NEXT: cmpl %edi, %eax
+; X64-NEXT: sete %al
; X64-NEXT: retq
%tmp0 = add i32 %x, -32768 ; ~0U << (16-1)
%tmp1 = icmp uge i32 %tmp0, -65536 ; ~0U << 16
@@ -203,16 +201,16 @@ define i1 @add_ugecmp_i32_i8(i32 %x) nou
; X86-LABEL: add_ugecmp_i32_i8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: addl $-128, %eax
-; X86-NEXT: cmpl $-257, %eax # imm = 0xFEFF
-; X86-NEXT: seta %al
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: cmpl %eax, %ecx
+; X86-NEXT: sete %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i32_i8:
; X64: # %bb.0:
-; X64-NEXT: addl $-128, %edi
-; X64-NEXT: cmpl $-257, %edi # imm = 0xFEFF
-; X64-NEXT: seta %al
+; X64-NEXT: movsbl %dil, %eax
+; X64-NEXT: cmpl %edi, %eax
+; X64-NEXT: sete %al
; X64-NEXT: retq
%tmp0 = add i32 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp uge i32 %tmp0, -256 ; ~0U << 8
@@ -223,19 +221,16 @@ define i1 @add_ugecmp_i64_i32(i64 %x) no
; X86-LABEL: add_ugecmp_i64_i32:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl $-2147483648, %ecx # imm = 0x80000000
-; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: adcl $-1, %eax
-; X86-NEXT: cmpl $-1, %eax
+; X86-NEXT: sarl $31, %eax
+; X86-NEXT: xorl {{[0-9]+}}(%esp), %eax
; X86-NEXT: sete %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i64_i32:
; X64: # %bb.0:
-; X64-NEXT: addq $-2147483648, %rdi # imm = 0x80000000
-; X64-NEXT: movabsq $-4294967297, %rax # imm = 0xFFFFFFFEFFFFFFFF
-; X64-NEXT: cmpq %rax, %rdi
-; X64-NEXT: seta %al
+; X64-NEXT: movslq %edi, %rax
+; X64-NEXT: cmpq %rdi, %rax
+; X64-NEXT: sete %al
; X64-NEXT: retq
%tmp0 = add i64 %x, -2147483648 ; ~0U << (32-1)
%tmp1 = icmp uge i64 %tmp0, -4294967296 ; ~0U << 32
@@ -246,21 +241,19 @@ define i1 @add_ugecmp_i64_i16(i64 %x) no
; X86-LABEL: add_ugecmp_i64_i16:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl $-32768, %ecx # imm = 0x8000
-; X86-NEXT: addl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: adcl $-1, %eax
-; X86-NEXT: movl $-65537, %edx # imm = 0xFFFEFFFF
-; X86-NEXT: cmpl %ecx, %edx
-; X86-NEXT: movl $-1, %ecx
-; X86-NEXT: sbbl %eax, %ecx
-; X86-NEXT: setb %al
+; X86-NEXT: movswl %ax, %ecx
+; X86-NEXT: xorl %ecx, %eax
+; X86-NEXT: sarl $31, %ecx
+; X86-NEXT: xorl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: orl %eax, %ecx
+; X86-NEXT: sete %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i64_i16:
; X64: # %bb.0:
-; X64-NEXT: addq $-32768, %rdi # imm = 0x8000
-; X64-NEXT: cmpq $-65537, %rdi # imm = 0xFFFEFFFF
-; X64-NEXT: seta %al
+; X64-NEXT: movswq %di, %rax
+; X64-NEXT: cmpq %rdi, %rax
+; X64-NEXT: sete %al
; X64-NEXT: retq
%tmp0 = add i64 %x, -32768 ; ~0U << (16-1)
%tmp1 = icmp uge i64 %tmp0, -65536 ; ~0U << 16
@@ -271,21 +264,19 @@ define i1 @add_ugecmp_i64_i8(i64 %x) nou
; X86-LABEL: add_ugecmp_i64_i8:
; X86: # %bb.0:
; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: movl {{[0-9]+}}(%esp), %ecx
-; X86-NEXT: addl $-128, %eax
-; X86-NEXT: adcl $-1, %ecx
-; X86-NEXT: movl $-257, %edx # imm = 0xFEFF
-; X86-NEXT: cmpl %eax, %edx
-; X86-NEXT: movl $-1, %eax
-; X86-NEXT: sbbl %ecx, %eax
-; X86-NEXT: setb %al
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: xorl %ecx, %eax
+; X86-NEXT: sarl $31, %ecx
+; X86-NEXT: xorl {{[0-9]+}}(%esp), %ecx
+; X86-NEXT: orl %eax, %ecx
+; X86-NEXT: sete %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugecmp_i64_i8:
; X64: # %bb.0:
-; X64-NEXT: addq $-128, %rdi
-; X64-NEXT: cmpq $-257, %rdi # imm = 0xFEFF
-; X64-NEXT: seta %al
+; X64-NEXT: movsbq %dil, %rax
+; X64-NEXT: cmpq %rdi, %rax
+; X64-NEXT: sete %al
; X64-NEXT: retq
%tmp0 = add i64 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp uge i64 %tmp0, -256 ; ~0U << 8
@@ -296,19 +287,17 @@ define i1 @add_ugecmp_i64_i8(i64 %x) nou
define i1 @add_ugtcmp_i16_i8(i16 %x) nounwind {
; X86-LABEL: add_ugtcmp_i16_i8:
; X86: # %bb.0:
-; X86-NEXT: movl {{[0-9]+}}(%esp), %eax
-; X86-NEXT: addl $-128, %eax
-; X86-NEXT: movzwl %ax, %eax
-; X86-NEXT: cmpl $65279, %eax # imm = 0xFEFF
-; X86-NEXT: seta %al
+; X86-NEXT: movzwl {{[0-9]+}}(%esp), %eax
+; X86-NEXT: movsbl %al, %ecx
+; X86-NEXT: cmpw %ax, %cx
+; X86-NEXT: sete %al
; X86-NEXT: retl
;
; X64-LABEL: add_ugtcmp_i16_i8:
; X64: # %bb.0:
-; X64-NEXT: addl $-128, %edi
-; X64-NEXT: movzwl %di, %eax
-; X64-NEXT: cmpl $65279, %eax # imm = 0xFEFF
-; X64-NEXT: seta %al
+; X64-NEXT: movsbl %dil, %eax
+; X64-NEXT: cmpw %di, %ax
+; X64-NEXT: sete %al
; X64-NEXT: retq
%tmp0 = add i16 %x, -128 ; ~0U << (8-1)
%tmp1 = icmp ugt i16 %tmp0, -257 ; ~0U << 8 - 1
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