[llvm] r341222 - [X86][BtVer2] Remove wrong ReadAdvance from AVX vbroadcast(ss|sd|f128) instructions.

[Andrea Di Biagio via llvm-commits]

Author: adibiagio
Date: Fri Aug 31 09:05:48 2018
New Revision: 341222

URL: http://llvm.org/viewvc/llvm-project?rev=341222&view=rev
Log:
[X86][BtVer2] Remove wrong ReadAdvance from AVX vbroadcast(ss|sd|f128) instructions.

The presence of a ReadAdvance for input operand #0 is problematic
because it changes the input latency of the register used as the base address
for the folded load.

A broadcast cannot start executing if the load address hasn't been computed yet.

In the llvm-mca example, the VBROADCASTSS is dependent on the address generated
by the LEAQ.  That means, it cannot start until LEAQ reaches the write-back
stage. If we apply ReadAdvance, then we wrongly assume that the load can start 3
cycles in advance.

Differential Revision: https://reviews.llvm.org/D51534

Modified:
    llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
    llvm/trunk/test/tools/llvm-mca/X86/BtVer2/vbroadcast-operand-latency.s

Modified: llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td?rev=341222&r1=341221&r2=341222&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td (original)
+++ llvm/trunk/lib/Target/X86/X86ScheduleBtVer2.td Fri Aug 31 09:05:48 2018
@@ -570,9 +570,9 @@ def JWriteVBROADCASTYLd: SchedWriteRes<[
   let ResourceCycles = [1, 2, 4];
   let NumMicroOps = 2;
 }
-def : InstRW<[JWriteVBROADCASTYLd, ReadAfterLd], (instrs VBROADCASTSDYrm,
-                                                         VBROADCASTSSYrm,
-                                                         VBROADCASTF128)>;
+def : InstRW<[JWriteVBROADCASTYLd], (instrs VBROADCASTSDYrm,
+                                            VBROADCASTSSYrm,
+                                            VBROADCASTF128)>;
 
 def JWriteJVZEROALL: SchedWriteRes<[]> {
   let Latency = 90;

Modified: llvm/trunk/test/tools/llvm-mca/X86/BtVer2/vbroadcast-operand-latency.s
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/tools/llvm-mca/X86/BtVer2/vbroadcast-operand-latency.s?rev=341222&r1=341221&r2=341222&view=diff
==============================================================================
--- llvm/trunk/test/tools/llvm-mca/X86/BtVer2/vbroadcast-operand-latency.s (original)
+++ llvm/trunk/test/tools/llvm-mca/X86/BtVer2/vbroadcast-operand-latency.s Fri Aug 31 09:05:48 2018
@@ -6,7 +6,7 @@ vbroadcastss (%rax), %ymm0
 
 # CHECK:      Iterations:        100
 # CHECK-NEXT: Instructions:      200
-# CHECK-NEXT: Total Cycles:      208
+# CHECK-NEXT: Total Cycles:      209
 # CHECK-NEXT: Total uOps:        300
 
 # CHECK:      Dispatch Width:    2
@@ -52,15 +52,15 @@ vbroadcastss (%rax), %ymm0
 # CHECK-NEXT:  -      -      -     2.00   2.00   1.00   1.00   1.00    -      -      -      -      -      -     vbroadcastss	(%rax), %ymm0
 
 # CHECK:      Timeline view:
-# CHECK-NEXT:                     0123
+# CHECK-NEXT:                     01234
 # CHECK-NEXT: Index     0123456789
 
-# CHECK:      [0,0]     DeeER.    .  .   leaq	8(%rsp,%rdi,2), %rax
-# CHECK-NEXT: [0,1]     .DeeeeeeER.  .   vbroadcastss	(%rax), %ymm0
-# CHECK-NEXT: [1,0]     . DeeE---R.  .   leaq	8(%rsp,%rdi,2), %rax
-# CHECK-NEXT: [1,1]     .  DeeeeeeER .   vbroadcastss	(%rax), %ymm0
-# CHECK-NEXT: [2,0]     .   DeeE---R .   leaq	8(%rsp,%rdi,2), %rax
-# CHECK-NEXT: [2,1]     .    DeeeeeeER   vbroadcastss	(%rax), %ymm0
+# CHECK:      [0,0]     DeeER.    .   .   leaq	8(%rsp,%rdi,2), %rax
+# CHECK-NEXT: [0,1]     .D=eeeeeeER   .   vbroadcastss	(%rax), %ymm0
+# CHECK-NEXT: [1,0]     . DeeE----R   .   leaq	8(%rsp,%rdi,2), %rax
+# CHECK-NEXT: [1,1]     .  D=eeeeeeER .   vbroadcastss	(%rax), %ymm0
+# CHECK-NEXT: [2,0]     .   DeeE----R .   leaq	8(%rsp,%rdi,2), %rax
+# CHECK-NEXT: [2,1]     .    D=eeeeeeER   vbroadcastss	(%rax), %ymm0
 
 # CHECK:      Average Wait times (based on the timeline view):
 # CHECK-NEXT: [0]: Executions
@@ -69,5 +69,5 @@ vbroadcastss (%rax), %ymm0
 # CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
 
 # CHECK:            [0]    [1]    [2]    [3]
-# CHECK-NEXT: 0.     3     1.0    1.0    2.0       leaq	8(%rsp,%rdi,2), %rax
-# CHECK-NEXT: 1.     3     1.0    1.0    0.0       vbroadcastss	(%rax), %ymm0
+# CHECK-NEXT: 0.     3     1.0    1.0    2.7       leaq	8(%rsp,%rdi,2), %rax
+# CHECK-NEXT: 1.     3     2.0    0.0    0.0       vbroadcastss	(%rax), %ymm0